Attention is currently required from: Kyösti Mälkki.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/70049 )
Change subject: sb/intel/common: Rename and inline {read,write}_pmbaseX() ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
File src/southbridge/intel/common/pmbase.h:
https://review.coreboot.org/c/coreboot/+/70049/comment/a3905d4f_82caea8d PS4, Line 14: #elif CONFIG(TCO_SPACE_NOT_YET_SPLIT) : /* Must let TCO registers 0x60..0x80 through. */ : #define PMSIZE 0x80 : #elif CONFIG(SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS) : /* TCO registers 0x60..0x80 moved, these are now GPEs. */ : #define PMSIZE 0x80
Well removal of TCO_SPACE_NOT_YET_SPLIT is already in the queue. […]
OK, fine with me either way.