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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74760 )
Change subject: soc/intel: Don't report _S1 state when unsupported
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS2:
For now yes, but it will keep increasing in future (as all modern Intel platform will not support th […]
Unless we stop copy-pasting everything for every new platform. Or find something
they have in common. Skylake was also the first to put the ACPI registers in a PMC
device, IIRC. SOC_INTEL_COMMON_BLOCK_PMC seems to cover all of these. Mostly through
SOC_INTEL_COMMON_PCH_BASE.
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