HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46152 )
Change subject: mb/amd/thatcher: Convert to ASL 2.0 syntax ......................................................................
mb/amd/thatcher: Convert to ASL 2.0 syntax
Change-Id: If1869d091f9c78db7e308143d96b5d3046510ac8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/mainboard/amd/thatcher/acpi/sleep.asl 1 file changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/46152/1
diff --git a/src/mainboard/amd/thatcher/acpi/sleep.asl b/src/mainboard/amd/thatcher/acpi/sleep.asl index af87ce6..e09a638 100644 --- a/src/mainboard/amd/thatcher/acpi/sleep.asl +++ b/src/mainboard/amd/thatcher/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* @@ -64,6 +64,6 @@ /* DBGO(" to S0\n") */
/* clear USB wake up signal */ - Store(1, USBS) + USBS = 1 Return(WKST) } /* End Method(_WAK) */
Attention is currently required from: HAOUAS Elyes. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46152 )
Change subject: mb/amd/thatcher: Convert to ASL 2.0 syntax ......................................................................
Patch Set 2: Code-Review+2
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46152 )
Change subject: mb/amd/thatcher: Convert to ASL 2.0 syntax ......................................................................
mb/amd/thatcher: Convert to ASL 2.0 syntax
Change-Id: If1869d091f9c78db7e308143d96b5d3046510ac8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/46152 Reviewed-by: Michael Niewöhner foss@mniewoehner.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/amd/thatcher/acpi/sleep.asl 1 file changed, 8 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/amd/thatcher/acpi/sleep.asl b/src/mainboard/amd/thatcher/acpi/sleep.asl index af87ce6..e09a638 100644 --- a/src/mainboard/amd/thatcher/acpi/sleep.asl +++ b/src/mainboard/amd/thatcher/acpi/sleep.asl @@ -26,20 +26,20 @@ /* DBGO("\n") */
/* Clear sleep SMI status flag and enable sleep SMI trap. */ - /*Store(One, CSSM) - Store(One, SSEN)*/ + /*CSSM = 1 + SSEN = 1*/
/* On older chips, clear PciExpWakeDisEn */ - /*if (LLessEqual(_SB.SBRI, 0x13)) { - * Store(0,_SB.PWDE) + /*if (_SB.SBRI <= 0x13) { + * _SB.PWDE = 0 *} */
/* Clear wake status structure. */ - Store(0, Index(WKST,0)) - Store(0, Index(WKST,1)) + WKST [0] = 0 + WKST [1] = 0
- Store (0x07, UPWS) + UPWS = 0x07 } /* End Method(_PTS) */
/* @@ -64,6 +64,6 @@ /* DBGO(" to S0\n") */
/* clear USB wake up signal */ - Store(1, USBS) + USBS = 1 Return(WKST) } /* End Method(_WAK) */
-
HAOUAS Elyes (Code Review) -
Michael Niewöhner (Code Review)