Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68216 )
Change subject: nb/intel/i945/raminit: Use 'bool' for clkcfg_bit7 ......................................................................
nb/intel/i945/raminit: Use 'bool' for clkcfg_bit7
Signed-off-by: Elyes Haouas ehaouas@noos.fr Change-Id: Ia87fbbeb9ecb57ee2f4879404cbae5403de9bfc7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68216 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/i945/raminit.c M src/northbridge/intel/i945/raminit.h 2 files changed, 19 insertions(+), 10 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c index 7b8c84d..47a37ce 100644 --- a/src/northbridge/intel/i945/raminit.c +++ b/src/northbridge/intel/i945/raminit.c @@ -1604,7 +1604,8 @@ static void sdram_program_graphics_frequency(struct sys_info *sysinfo) { u8 reg8; - u8 freq, second_vco, voltage; + u8 freq, voltage; + bool second_vco = false;
#define CRCLK_166MHz 0x00 #define CRCLK_200MHz 0x01 @@ -1680,10 +1681,8 @@ else sysinfo->mvco4x = 0;
- second_vco = 0; - if (voltage == VOLTAGE_1_50) { - second_vco = 1; + second_vco = true; } else if ((i945_silicon_revision() > 0) && (freq == CRCLK_250MHz)) { u16 mem = sysinfo->memory_frequency; u16 fsb = sysinfo->fsb_frequency; @@ -1691,17 +1690,14 @@ if ((fsb == 667 && mem == 533) || (fsb == 533 && mem == 533) || (fsb == 533 && mem == 400)) { - second_vco = 1; + second_vco = true; }
if (fsb == 667 && mem == 533) sysinfo->mvco4x = 1; }
- if (second_vco) - sysinfo->clkcfg_bit7 = 1; - else - sysinfo->clkcfg_bit7 = 0; + sysinfo->clkcfg_bit7 = second_vco;
/* Graphics Core Render Clock */ pci_update_config16(IGD_DEV, GCFC, ~((7 << 0) | (1 << 13)), freq); diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h index efaedf4..22c4faf 100644 --- a/src/northbridge/intel/i945/raminit.h +++ b/src/northbridge/intel/i945/raminit.h @@ -30,7 +30,7 @@ bool interleaved;
u8 mvco4x; /* 0 (8x) or 1 (4x) */ - u8 clkcfg_bit7; + bool clkcfg_bit7; u8 boot_path; #define BOOT_PATH_NORMAL 0 #define BOOT_PATH_RESET 1