Hello Arthur Heymans, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/21847
to look at the new patch set (#2).
Change subject: nb/intel/gm45: Remove UMA alignment optimization ......................................................................
nb/intel/gm45: Remove UMA alignment optimization
This code path was only triggered in one corner case: GFX UMA set to 48MiB. It created a hole below UMA to save MTRRs. But, this hole was never accounted for when calculating cbmem_top(). Instead of trying to fix it, remove it, it's not worth the trouble.
TEST=Booted lenovo/x200 with all available CMOS gfx_uma_size settings.
Change-Id: I3f4ceec4224d86113be9bfa3ce4759bed584640d Signed-off-by: Nico Huber nico.h@gmx.de --- M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/gm45/raminit.c 2 files changed, 3 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/21847/2