[XL] Change in coreboot[main]: soc/intel/ptl: Add SoC ACPI directory for Panther Lake

[Saurabh Mishra (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Jamie Ryu, Kapil Porwal, Paul Menzel, Pranava Y N, Ravishankar Sarawadi, Saurabh Mishra, Wonkyu Kim.

Saurabh Mishra has uploaded a new patch set (#82) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email )

Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
......................................................................

soc/intel/ptl: Add SoC ACPI directory for Panther Lake

List of changes:
1. Select common ACPI Kconfig to include common ACPI code block
from IA-common code
2. Select ACPI Kconfig support for wake-up from sleep states.
3. Add SoC ASL code for SoC IPs like IPU, HDA etc.
4. PTL replaces DMI3 with SAF to ensure
   common/block/acpi/acpi/northbridge.asl binding with PTL change,
   #if DMI_BASE_SIZE guard check is added in northbridge.asl

BUG=b:348678529
TEST=Verified on Intel® Simics® Pre Silicon Simulation platform
     for PTL using google/fatcat mainboard.

Change-Id: Ia5cf899b049cb8eb27b4ea30c7f3ce7a14884f15
Signed-off-by: Ravi Sarawadi 
---
M src/soc/intel/common/block/acpi/acpi/northbridge.asl
M src/soc/intel/pantherlake/Kconfig
A src/soc/intel/pantherlake/acpi/camera_clock_ctl.asl
A src/soc/intel/pantherlake/acpi/hda.asl
A src/soc/intel/pantherlake/acpi/pcie.asl
A src/soc/intel/pantherlake/acpi/serialio.asl
A src/soc/intel/pantherlake/acpi/southbridge.asl
A src/soc/intel/pantherlake/acpi/tcss.asl
A src/soc/intel/pantherlake/acpi/tcss_dma.asl
A src/soc/intel/pantherlake/acpi/tcss_pcierp.asl
A src/soc/intel/pantherlake/acpi/tcss_xhci.asl
A src/soc/intel/pantherlake/acpi/xhci.asl
12 files changed, 2,003 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/83772/82