Attention is currently required from: Arthur Heymans, Christian Walter, Felix Held, Jincheng Li, Johnny Lin, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu.
Hello Arthur Heymans, Christian Walter, Felix Held, Jincheng Li, Johnny Lin, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Tim Chu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/80632?usp=email
to look at the new patch set (#5).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/intel/xeon_sp: Add memory type check utils
......................................................................
soc/intel/xeon_sp: Add memory type check utils
FSP memory type representations change across Xeon-SP SoCs.
This patch adds type check utils to abstract the differences.
TEST=intel/archercity CRB
Change-Id: I2f5f3c0f16dc50bc739146e46afce2e5fbf4f62c
Signed-off-by: Shuo Liu shuo.liu@intel.com
Signed-off-by: Jincheng Li jincheng.li@intel.com
---
M src/soc/intel/xeon_sp/include/soc/util.h
M src/soc/intel/xeon_sp/spr/soc_util.c
M src/soc/intel/xeon_sp/uncore_acpi.c
M src/soc/intel/xeon_sp/util.c
4 files changed, 35 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/80632/5
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I2f5f3c0f16dc50bc739146e46afce2e5fbf4f62c
Gerrit-Change-Number: 80632
Gerrit-PatchSet: 5
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