[S] Change in coreboot[main]: mb/trulo/var/uldrenite: Configure Network

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85583?usp=email )

Change subject: mb/trulo/var/uldrenite: Configure Network
......................................................................

mb/trulo/var/uldrenite: Configure Network

1. Enable CNVi WiFI and BT
2. Enable WWAN driver

BUG=b:380789023
TEST=emerge-nissa coreboot

Change-Id: I2fd292550700817f15813dabfbaf9ccab3a907d8
Signed-off-by: John Su 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85583
Reviewed-by: Kapil Porwal 
Tested-by: build bot (Jenkins) 
Reviewed-by: Dtrain Hsu 
---
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/brya/variants/uldrenite/include/variant/gpio.h
M src/mainboard/google/brya/variants/uldrenite/overridetree.cb
3 files changed, 45 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Dtrain Hsu: Looks good to me, approved
  Kapil Porwal: Looks good to me, approved

diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index d894f7f..bc53fdf 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -613,6 +613,9 @@
 config BOARD_GOOGLE_ULDRENITE
    select BOARD_GOOGLE_BASEBOARD_TRULO
    select SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION
+	select HAVE_PCIE_WWAN
+	select HAVE_WWAN_POWER_SEQUENCE
+	select DRIVERS_WWAN_FM350GL

config BOARD_GOOGLE_VELL
    select BOARD_GOOGLE_BASEBOARD_BRYA
diff --git a/src/mainboard/google/brya/variants/uldrenite/include/variant/gpio.h b/src/mainboard/google/brya/variants/uldrenite/include/variant/gpio.h
index c4fe342..25edb0c 100644
--- a/src/mainboard/google/brya/variants/uldrenite/include/variant/gpio.h
+++ b/src/mainboard/google/brya/variants/uldrenite/include/variant/gpio.h
@@ -5,4 +5,10 @@

#include <baseboard/gpio.h>

+#define WWAN_FCPO	GPP_H23
+#define WWAN_RST	GPP_F12
+#define WWAN_PERST	GPP_H13
+#define T1_OFF_MS	20
+#define T2_OFF_MS	10
+
 #endif
diff --git a/src/mainboard/google/brya/variants/uldrenite/overridetree.cb b/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
index d225e19..4e6a8b0 100644
--- a/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
+++ b/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
@@ -9,6 +9,9 @@

register "tcc_offset" = "5"     # TCC of 100

+	# Enable CNVi BT
+	register "cnvi_bt_core" = "true"
+
    # eMMC HS400
    register "emmc_enable_hs400_mode" = "true"

@@ -285,6 +288,14 @@
    			end
    		end
    	end
+		device ref cnvi_wifi on
+			chip drivers/wifi/generic
+				register "wake" = "GPE0_PME_B0"
+				register "enable_cnvi_ddr_rfim" = "true"
+				register "add_acpi_dma_property" = "true"
+				device generic 0 on end
+			end
+		end
    	device ref i2c0 on
    		chip drivers/i2c/tpm
    			register "hid" = ""GOOG0005""
@@ -405,6 +416,31 @@
    			device i2c 40 on end
    		end # GTCH7502
    	end # I2C5
+		device ref pcie_rp2 on
+			# Enable WWAN Card PCIE 2 using clk 2
+			register "pch_pcie_rp[PCH_RP(2)]" = "{
+				.clk_src = 2,
+				.clk_req = 2,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+			}"
+			chip soc/intel/common/block/pcie/rtd3
+				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F13)"
+				register "reset_off_delay_ms" = "20"
+				register "srcclk_pin" = "2"
+				register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
+				register "skip_on_off_support" = "true"
+				device generic 0 alias rp2_rtd3 on end
+			end
+			chip drivers/wwan/fm
+				register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H23)"
+				register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F12)"
+				register "perst_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F13)"
+				register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)"
+				register "add_acpi_dma_property" = "true"
+				use rp2_rtd3 as rtd3dev
+				device generic 0 alias rp2_wwan on end
+			end
+		end # PCIE2 WWAN card
    	device ref emmc on end
    	device ref uart0 on end
    	device ref pch_espi on