[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
Attention is currently required from: Kapil Porwal, Pranava Y N, Subrata Banik.
Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83798?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage ......................................................................
Patch Set 61:
(4 comments)
File src/soc/intel/pantherlake/acpi.c:
https://review.coreboot.org/c/coreboot/+/83798/comment/ff11ca3e_9afc7a17?usp... : PS55, Line 238: 0x1
are you checking BIT0? if yes, then what BIT-0 refers to here ? […]
As per PTL FAS, which refers to LNL FAS #733648, section 11.5 1. VTd 0 Enabled (IOMMU 0 - gfx) Check Bit 0 set in (MCHBAR + 0x5410) 2. VTd 1 Enabled (IOMMU 1 – nongfx) Check Bit 1 set in (MCHBAR + 0x5410) 3. VTd Enabled (VTd 2 – Global IOMMU) Vtd Enabled in the platform if Bit 2 set in (MCHBAR + 0x5410)
https://review.coreboot.org/c/coreboot/+/83798/comment/7d42c8f2_4a3b76a0?usp... : PS55, Line 251: 0x2
what is BIT(1)? need macro
Acknowledged
https://review.coreboot.org/c/coreboot/+/83798/comment/c5967cad_181e095d?usp... : PS55, Line 330: 0x7
what is this magic value ? can you please explain?
As per PTL FAS, which refers to LNL FAS #733648, section 11.5
VTd 0 Enabled (IOMMU 0 - gfx) Check Bit 0 set in (MCHBAR + 0x5410) VTd 1 Enabled (IOMMU 1 – nongfx) Check Bit 1 set in (MCHBAR + 0x5410) VTd Enabled (VTd 2 – Global IOMMU) Vtd Enabled in the platform if Bit 2 set in (MCHBAR + 0x5410)
So, here we are checking all the 3 bits to be enabled. Added (GFXVT_ENABLED | NONGFXVT_ENABLED | IOCVT_ENABLED)
File src/soc/intel/pantherlake/acpi.c:
https://review.coreboot.org/c/coreboot/+/83798/comment/6b8949c9_21f64f06?usp... : PS59, Line 272: 0x4
No, not updated yet. Will make the change.
I have added a new macro in https://review.coreboot.org/c/coreboot/+/83798/61/src/soc/intel/pantherlake/...
Updated to use these macros.
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Saurabh Mishra (Code Review)