Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42685 )
Change subject: soc/amd/common: Drop ACPIMMIO bank for SMBus device PCI config ......................................................................
Patch Set 6:
(3 comments)
https://review.coreboot.org/c/coreboot/+/42685/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42685/6//COMMIT_MSG@7 PS6, Line 7: Drop ACPIMMIO ban Why do you want to drop it?
https://review.coreboot.org/c/coreboot/+/42685/6//COMMIT_MSG@10 PS6, Line 10: PCI config write Sure: D14F0x0FC
https://review.coreboot.org/c/coreboot/+/42685/6/src/soc/amd/picasso/uart.c File src/soc/amd/picasso/uart.c:
https://review.coreboot.org/c/coreboot/+/42685/6/src/soc/amd/picasso/uart.c@... PS6, Line 60: Help
0=use 48MHz as UART baud rate clock. 1=enable UART legacy mode to use 1.843MHz as baud rate clock.
I would personally remove this option. The kernel assumes a 48MHz clock: https://source.chromium.org/chromiumos/chromiumos/codesearch/+/master:src/th...