Attention is currently required from: Anil Kumar K, Tarun Tuli, Kapil Porwal, Sridhar Siricilla.
Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Kapil Porwal,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/74763
to look at the new patch set (#3).
Change subject: soc/intel/meteorlake: Add config option to choose CSE FW sync in ROMSTAGE ......................................................................
soc/intel/meteorlake: Add config option to choose CSE FW sync in ROMSTAGE
the change 'commit:248dbe0908f1b: ("Trigger cse_fw_sync before DRAM Init")' added change to enable CSE FW sync in ROMSTAGE i.e. before DRAM initialization.
This patch adds CONFIG flag to choose CSE FW sync in ROMSTAGE, allowing platforms to disable this option when they choose to perform CSE FW sync in RAMSTAGE instead.
Change-Id: I0a5922f40e719e1bc4e6dc58559d820172550dee Signed-off-by: Anil Kumar anil.kumar.k@intel.com
BUG=b:273207144 BRANCH=none
Change-Id: I8e603a2ecf1a67ee7c683b440072889d137f9de0 --- M src/soc/intel/meteorlake/romstage/romstage.c 1 file changed, 25 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/74763/3