Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56842 )
Change subject: mb/google/cherry: early-init eMMC ......................................................................
mb/google/cherry: early-init eMMC
Some eMMCs need 80+ms for CMD1 to complete. And the payload may need to access eMMC in the very early stage (for example, Depthcharge needs it 20ms after started) so we have to start initialization in coreboot.
BUG=b:195274787 TEST=emerge-cherry coreboot BRANCH=cherry
Signed-off-by: Wenbin Mei wenbin.mei@mediatek.com Change-Id: Idc86f9121fa4a34f09a683f7a81087c13ea3dd42 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56842 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Rex-BC Chen rex-bc.chen@mediatek.corp-partner.google.com Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/mainboard/google/cherry/mainboard.c 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Rex-BC Chen: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/cherry/mainboard.c b/src/mainboard/google/cherry/mainboard.c index 6b29f44..bb6dbac 100644 --- a/src/mainboard/google/cherry/mainboard.c +++ b/src/mainboard/google/cherry/mainboard.c @@ -14,6 +14,7 @@ #include <soc/dptx.h> #include <soc/gpio.h> #include <soc/i2c.h> +#include <soc/msdc.h> #include <soc/mt6360.h> #include <soc/mtcmos.h> #include <soc/regulator.h> @@ -39,6 +40,9 @@ DEFINE_BITFIELD(MSDC1_GPIO_MODE1_2, 10, 8) DEFINE_BITFIELD(MSDC1_GPIO_MODE1_3, 14, 12)
+#define MSDC0_BASE 0x11230000 +#define MSDC0_TOP_BASE 0x11f50000 + #define MSDC0_DRV_VALUE 0x1b6db6db #define MSDC1_DRV_VALUE 0x1b6db #define MSDC1_GPIO_MODE0_VALUE 0x1 @@ -85,6 +89,8 @@
/* set eMMC cmd/dat/clk/ds/rstb pins driving to 8mA */ SET32_BITFIELDS(gpio_base, MSDC0_DRV, MSDC0_DRV_VALUE); + + mtk_emmc_early_init((void *)MSDC0_BASE, (void *)MSDC0_TOP_BASE); }
static void configure_sdcard(void)