Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47838 )
Change subject: mb/intel/adlrvp: Enable pre-boot display over HDMI-B port ......................................................................
mb/intel/adlrvp: Enable pre-boot display over HDMI-B port
List of changes: 1. Configure CTRLCLK and CTRLDAYA for HDMI 2. Enable Ddc and HPD for Port-B 3. Disable dual eDP configuration for Port-A and B
TEST=Able to see depthcharge pre-boot screens over HDMI-B port.
Change-Id: I7509b981f35fc60a7885b2b07067cb0d35ec625f Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/adlrvp/devicetree.cb M src/mainboard/intel/adlrvp/gpio.c 2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/47838/1
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index ce55fa3..80edb92 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -90,7 +90,9 @@
# Enable EDP in PortA register "DdiPortAConfig" = "1" - register "DdiPortBConfig" = "1" + # Enable HDMI in Port B + register "DdiPortBDdc" = "1" + register "DdiPortBHpd" = "1"
# TCSS USB3 register "TcssAuxOri" = "0" diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c index a44d4ac..89e6f58 100644 --- a/src/mainboard/intel/adlrvp/gpio.c +++ b/src/mainboard/intel/adlrvp/gpio.c @@ -287,6 +287,11 @@ PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H23, NONE, DEEP, NF1), + + /* A21 : HDMI CRLS CTRLCLK */ + PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1), + /* A22 : HDMI CRLS CTRLDATA */ + PAD_CFG_NF(GPP_A22, NONE, DEEP, NF1), };
void variant_configure_gpio_pads(void)
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47838
to look at the new patch set (#2).
Change subject: mb/intel/adlrvp: Enable pre-boot display over HDMI-B port ......................................................................
mb/intel/adlrvp: Enable pre-boot display over HDMI-B port
List of changes: 1. Configure CTRLCLK and CTRLDATA for HDMI 2. Enable Ddc and HPD for Port-B 3. Disable dual eDP configuration for Port-A and B
TEST=Able to see depthcharge pre-boot screens over HDMI-B port.
Change-Id: I7509b981f35fc60a7885b2b07067cb0d35ec625f Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/intel/adlrvp/devicetree.cb M src/mainboard/intel/adlrvp/gpio.c 2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/47838/2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47838 )
Change subject: mb/intel/adlrvp: Enable pre-boot display over HDMI-B port ......................................................................
Patch Set 2:
Can you please help me with review this CL? Thanks
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47838 )
Change subject: mb/intel/adlrvp: Enable pre-boot display over HDMI-B port ......................................................................
Patch Set 2: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47838 )
Change subject: mb/intel/adlrvp: Enable pre-boot display over HDMI-B port ......................................................................
Patch Set 2:
Patch Set 2:
Can you please help me with review this CL? Thanks
Thanks Angel
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47838 )
Change subject: mb/intel/adlrvp: Enable pre-boot display over HDMI-B port ......................................................................
mb/intel/adlrvp: Enable pre-boot display over HDMI-B port
List of changes: 1. Configure CTRLCLK and CTRLDATA for HDMI 2. Enable Ddc and HPD for Port-B 3. Disable dual eDP configuration for Port-A and B
TEST=Able to see depthcharge pre-boot screens over HDMI-B port.
Change-Id: I7509b981f35fc60a7885b2b07067cb0d35ec625f Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/47838 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/intel/adlrvp/devicetree.cb M src/mainboard/intel/adlrvp/gpio.c 2 files changed, 8 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/intel/adlrvp/devicetree.cb b/src/mainboard/intel/adlrvp/devicetree.cb index ce55fa3..80edb92 100644 --- a/src/mainboard/intel/adlrvp/devicetree.cb +++ b/src/mainboard/intel/adlrvp/devicetree.cb @@ -90,7 +90,9 @@
# Enable EDP in PortA register "DdiPortAConfig" = "1" - register "DdiPortBConfig" = "1" + # Enable HDMI in Port B + register "DdiPortBDdc" = "1" + register "DdiPortBHpd" = "1"
# TCSS USB3 register "TcssAuxOri" = "0" diff --git a/src/mainboard/intel/adlrvp/gpio.c b/src/mainboard/intel/adlrvp/gpio.c index a44d4ac..89e6f58 100644 --- a/src/mainboard/intel/adlrvp/gpio.c +++ b/src/mainboard/intel/adlrvp/gpio.c @@ -287,6 +287,11 @@ PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1), PAD_CFG_NF(GPP_H23, NONE, DEEP, NF1), + + /* A21 : HDMI CRLS CTRLCLK */ + PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1), + /* A22 : HDMI CRLS CTRLDATA */ + PAD_CFG_NF(GPP_A22, NONE, DEEP, NF1), };
void variant_configure_gpio_pads(void)
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Angel Pons (Code Review) -
Subrata Banik (Code Review)