Change in coreboot[master]: ehl/fsp_params.c: setting for intel speed step from device tree

[Uwe Poeche (Code Review)]

Uwe Poeche has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63352 )

Change subject: ehl/fsp_params.c: setting for intel speed step from device tree
......................................................................

ehl/fsp_params.c: setting for intel speed step from device tree

This patch provides the set value for intel speed step in device tree
for fsps. Before that in case of not set value in device tree the
default value of disabled was overwritten by default enabled of fsp.

Test: /mainboard/siemens/mc_ehl/variants/mc_ehl1
Check status of Bit 16 in MSR 0x1a0 after boot.

Change-Id: I0a5ef4968a27978116c21ce35b3818c6b36e086f
Signed-off-by: Uwe Poeche 
---
M src/soc/intel/elkhartlake/fsp_params.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/63352/1

diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c
index 1584c6a..663ed46 100644
--- a/src/soc/intel/elkhartlake/fsp_params.c
+++ b/src/soc/intel/elkhartlake/fsp_params.c
@@ -264,6 +264,9 @@
    params->DdiPortCHpd = config->DdiPortCHpd;
    params->DdiPortCDdc = config->DdiPortCDdc;

+	/* setting for intel speed step from device tree */
+	params->Eist = config->eist_enable;
+
    /* Use coreboot MP PPI services if Kconfig is enabled */
    if (CONFIG(USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI))
    	params->CpuMpPpi = (uintptr_t) mp_fill_ppi_services_data();