[S] Change in coreboot[master]: vendorcode/mediatek/mt8195: Make order of operators more explicit

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74551 )

Change subject: vendorcode/mediatek/mt8195: Make order of operators more explicit
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vendorcode/mediatek/mt8195: Make order of operators more explicit

Clang warns about this.

Change-Id: I9a19f33df64a63e51e3dadac4aae28a8bb12121d
Signed-off-by: Arthur Heymans 
---
M src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c
1 file changed, 13 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/74551/1

diff --git a/src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c b/src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c
index 6634e48..14ea0b3 100644
--- a/src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c
+++ b/src/vendorcode/mediatek/mt8195/dramc/LP4_dram_init.c
@@ -116,7 +116,7 @@
     LP4_MRS(p,  1, MR1 , rank);
     LP4_MRS(p,  2, MR2 , rank);

-    MR3 = ((!tr->DBI_WR  & 1)<<7) | ((!tr->DBI_RD  & 1)<<6) | ((   PDDS     & 7)<<3) | ((PPRP       & 1)<<2) | ((tr->WR_PST & 1)<<1) | ((PU_CAL & 1)<<0);
+    MR3 = (((!tr->DBI_WR)  & 1)<<7) | (((!tr->DBI_RD)  & 1)<<6) | ((   PDDS     & 7)<<3) | ((PPRP       & 1)<<2) | ((tr->WR_PST & 1)<<1) | ((PU_CAL & 1)<<0);
     LP4_MRS(p,  3, MR3 , rank);
     LP4_MRS(p,  11, MR11 , rank);
     LP4_MRS(p,  12, MR12 , rank);