Attention is currently required from: David Wu, Hou-hsun Lee, Paul Menzel. Alan Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59576 )
Change subject: mb/google/brya/var/brask: Set PL and PsysPL ......................................................................
Patch Set 4:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59576/comment/6b611a5b_fc3c420c PS3, Line 9: defalut
default
Done
https://review.coreboot.org/c/coreboot/+/59576/comment/adc3770d_c5043fdb PS3, Line 9: Intel's spec
Please mention the document name and revision, and even document the values in the commit message so […]
Done
https://review.coreboot.org/c/coreboot/+/59576/comment/23b41abb_fa9f890f PS3, Line 9: Set the defalut PL1, PL2 and PL4 according to Intel's spec. : Set PsysPL2 and PsysPmax according to Brask's spec.
Please mark it up as a list, or reflow it for 75 characters per line.
Done
https://review.coreboot.org/c/coreboot/+/59576/comment/ef8d9e17_5fe22758 PS3, Line 10: Brask's spec
Ditto.
Done
File src/mainboard/google/brya/variants/brask/ramstage.c:
https://review.coreboot.org/c/coreboot/+/59576/comment/6e4d0b4d_57d2a2d4 PS3, Line 13: { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 15000, 15000, 55000, 55000, 123000 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 15000, 15000, 55000, 55000, 123000 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 28000, 28000, 64000, 64000, 90000 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 28000, 28000, 64000, 64000, 140000 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 45000, 45000, 115000, 115000, 215000 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, 45000, 45000, 95000, 95000, 125000 },
Sort it the other way around?
It's better to sort it in the same way with code here https://review.coreboot.org/c/coreboot/+/59483/6/src/soc/intel/alderlake/chi...
https://review.coreboot.org/c/coreboot/+/59576/comment/d60d35bd_8f11bd5a PS3, Line 23: { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, 15, 135 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_6, 15, 135 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_5, 28, 230 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 28, 230 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_3, 45, 230 }, : { PCI_DEVICE_ID_INTEL_ADL_P_ID_1, 45, 230 },
Ditto.
It's better to sort it in the same way with code here https://review.coreboot.org/c/coreboot/+/59483/6/src/soc/intel/alderlake/chi...
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Alan Huang (Code Review)