Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36087 )
Change subject: soc/intel/tigerlake: Do initial SoC commit ......................................................................
Patch Set 8:
(7 comments)
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi.c:
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/acp... PS8, Line 188: } missing newline
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/acp... PS8, Line 203: gnvs->pcnt = dev_count_cpu(); useless code, there's no user of PCNT
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/acp... PS8, Line 207: gnvs->cbmc = (uintptr_t)cbmem_find(CBMEM_ID_CONSOLE); useless code, there's no user of CBMC.
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/acp... PS8, Line 226: gnvs->u2we = config->usb2_wake_enable_bitmap; seems only be used on skylake
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/boo... File src/soc/intel/tigerlake/bootblock/pch.c:
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/boo... PS8, Line 75: reg32 |= PCI_COMMAND_MEMORY; to many spaces
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/gra... File src/soc/intel/tigerlake/graphics.c:
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/gra... PS8, Line 73: * GFX PEIM module inside FSP binary is taking care of graphics should depend on RUN_FSP_GOP
https://review.coreboot.org/c/coreboot/+/36087/8/src/soc/intel/tigerlake/gra... PS8, Line 78: * In case of non-FSP solution, SoC need to select VGA_ROM_RUN wrong
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Patrick Rudolph (Code Review)