[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions

[Hannah Williams (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Felix Held, Jamie Ryu, Subrata Banik.

Hannah Williams has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email )

Change subject: soc/intel/common/block/pmc: Add GPE1 functions
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Patch Set 17:

(1 comment)

File src/soc/intel/common/block/include/intelblocks/pmclib.h:

https://review.coreboot.org/c/coreboot/+/84104/comment/5b80adcf_a8447981?usp... :
PS11, Line 241: gpe0_mask
> > Subrata,  […]

@[e-mail]   I do not see use case for pmc_enable_std_gpe and pmc_disable_std_gpe. Where is this going be used?  I think we just need to be able to disable all GPE0 and GPE1 bits and also clear all of them from Coreboot boot sequence.  
Can we just have pmc_disable_all_gpe and remove pmc_enable_std_gpe and pmc_disable_std_gpe?