Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31860
Change subject: mb/google/octopus: Create Bloog varianta ......................................................................
mb/google/octopus: Create Bloog varianta
This commit create bloog variant for Octopus. Initial settings are copy from meep. Remove I2C tuning, WACOM digitizer and WEIDA touchscreen.
BUG=b:127736039 BRANCH=octopus TEST=None
Change-Id: I1d04c97cb0622075a25825ba2c835d556c8b0423 Signed-off-by: Tony Huang tony-huang@quanta.corp-partner.google.com --- M src/mainboard/google/octopus/Kconfig M src/mainboard/google/octopus/Kconfig.name A src/mainboard/google/octopus/variants/bloog/Makefile.inc A src/mainboard/google/octopus/variants/bloog/gpio.c A src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl A src/mainboard/google/octopus/variants/bloog/include/variant/ec.h A src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h A src/mainboard/google/octopus/variants/bloog/overridetree.cb 8 files changed, 201 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/31860/1
diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig index 8c13961..6dd062a 100644 --- a/src/mainboard/google/octopus/Kconfig +++ b/src/mainboard/google/octopus/Kconfig @@ -58,6 +58,7 @@ default "meep" if BOARD_GOOGLE_MEEP default "ampton" if BOARD_GOOGLE_AMPTON default "casta" if BOARD_GOOGLE_CASTA + default "bloog" if BOARD_GOOGLE_BLOOG default "octopus" if BOARD_GOOGLE_OCTOPUS
config DEVICETREE @@ -78,6 +79,7 @@ default "Meep" if BOARD_GOOGLE_MEEP default "Ampton" if BOARD_GOOGLE_AMPTON default "Casta" if BOARD_GOOGLE_CASTA + default "Bloog" if BOARD_GOOGLE_BLOOG default "Octopus" if BOARD_GOOGLE_OCTOPUS
config MAINBOARD_FAMILY @@ -95,6 +97,7 @@ default "MEEP TEST 1118" if BOARD_GOOGLE_MEEP default "AMPTON TEST 1285" if BOARD_GOOGLE_AMPTON default "CASTA TEST 8105" if BOARD_GOOGLE_CASTA + default "BLOOG TEST 2509" if BOARD_GOOGLE_BLOOG default "OCTOPUS TEST 6859" if BOARD_GOOGLE_OCTOPUS
config MAX_CPUS @@ -126,12 +129,14 @@ default y if BOARD_GOOGLE_FLEEX default y if BOARD_GOOGLE_BOBBA default y if BOARD_GOOGLE_CASTA + default y if BOARD_GOOGLE_BLOOG
config DRAM_PART_NUM_ALWAYS_IN_CBI bool depends on DRAM_PART_NUM_IN_CBI default y if BOARD_GOOGLE_AMPTON default y if BOARD_GOOGLE_CASTA + default y if BOARD_GOOGLE_BLOOG
config DRAM_PART_IN_CBI_BOARD_ID_MIN int diff --git a/src/mainboard/google/octopus/Kconfig.name b/src/mainboard/google/octopus/Kconfig.name index 498da36..adc7060 100644 --- a/src/mainboard/google/octopus/Kconfig.name +++ b/src/mainboard/google/octopus/Kconfig.name @@ -52,3 +52,9 @@ select BASEBOARD_OCTOPUS_LAPTOP select BOARD_GOOGLE_BASEBOARD_OCTOPUS select NHLT_DA7219 if INCLUDE_NHLT_BLOBS + +config BOARD_GOOGLE_BLOOG + bool "-> Bloog" + select BASEBOARD_OCTOPUS_LAPTOP + select BOARD_GOOGLE_BASEBOARD_OCTOPUS + select NHLT_DA7219 if INCLUDE_NHLT_BLOBS diff --git a/src/mainboard/google/octopus/variants/bloog/Makefile.inc b/src/mainboard/google/octopus/variants/bloog/Makefile.inc new file mode 100644 index 0000000..9fb63f5 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/Makefile.inc @@ -0,0 +1,3 @@ +bootblock-y += gpio.c + +ramstage-y += gpio.c diff --git a/src/mainboard/google/octopus/variants/bloog/gpio.c b/src/mainboard/google/octopus/variants/bloog/gpio.c new file mode 100644 index 0000000..001a488 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/gpio.c @@ -0,0 +1,36 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> +#include <soc/gpio.h> + +static const struct pad_config default_override_table[] = { + PAD_NC(GPIO_104, UP_20K), + + /* EN_PP3300_TOUCHSCREEN */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, + DISPUPD), + + /* EN_PP3300_WLAN_L */ + PAD_CFG_GPO(GPIO_178, 0, DEEP), +}; + +const struct pad_config *variant_override_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(default_override_table); + return default_override_table; +} diff --git a/src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl b/src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl new file mode 100644 index 0000000..cc17d56 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <baseboard/acpi/dptf.asl> diff --git a/src/mainboard/google/octopus/variants/bloog/include/variant/ec.h b/src/mainboard/google/octopus/variants/bloog/include/variant/ec.h new file mode 100644 index 0000000..16f931b --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/include/variant/ec.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h b/src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h new file mode 100644 index 0000000..1fd1e11 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_GPIO_H +#define MAINBOARD_GPIO_H + +#include <baseboard/gpio.h> + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/octopus/variants/bloog/overridetree.cb b/src/mainboard/google/octopus/variants/bloog/overridetree.cb new file mode 100644 index 0000000..98d0179 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/overridetree.cb @@ -0,0 +1,93 @@ +chip soc/intel/apollolake + + # EMMC Tx CMD Delay + # Refer to EDS-Vol2-16.32. + # [14:8] steps of delay for DDR mode, each 125ps. + # [6:0] steps of delay for SDR mode, each 125ps. + register "emmc_tx_cmd_cntl" = "0x505" + + # EMMC TX DATA Delay 1 + # Refer to EDS-Vol2-16.33. + # [14:8] steps of delay for HS400, each 125ps. + # [6:0] steps of delay for SDR104/HS200, each 125ps. + register "emmc_tx_data_cntl1" = "0x0b0d" + + # EMMC TX DATA Delay 2 + # Refer to EDS-Vol2-16.34. + # [30:24] steps of delay for SDR50, each 125ps. + # [22:16] steps of delay for DDR50, each 125ps. + # [14:8] steps of delay for SDR25/HS50, each 125ps. + # [6:0] steps of delay for SDR12, each 125ps. + register "emmc_tx_data_cntl2" = "0x1c2a2a2a" + + # EMMC RX CMD/DATA Delay 1 + # Refer to EDS-Vol2-16.35. + # [30:24] steps of delay for SDR50, each 125ps. + # [22:16] steps of delay for DDR50, each 125ps. + # [14:8] steps of delay for SDR25/HS50, each 125ps. + # [6:0] steps of delay for SDR12, each 125ps. + register "emmc_rx_cmd_data_cntl1" = "0x00171a1a" + + # EMMC RX CMD/DATA Delay 2 + # Refer to EDS-Vol2-16.37. + # [17:16] stands for Rx Clock before Output Buffer + # [14:8] steps of delay for Auto Tuning Mode, each 125ps. + # [6:0] steps of delay for HS200, each 125ps. + register "emmc_rx_cmd_data_cntl2" = "0x10028" + + # EMMC Rx Strobe Delay + # Refer to EDS-Vol2-16.36. + # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps. + # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps. + register "emmc_rx_strobe_cntl" = "0x0b0b" + + device domain 0 on + device pci 16.0 off end # - I2C 0 + device pci 17.1 on + chip drivers/i2c/da7219 + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 1a on end + end + end # - I2C 5 + device pci 17.2 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPIO_135_IRQ)" + register "wake" = "GPE0_DW3_27" + register "probed" = "1" + device i2c 15 on end + end + end # - I2C 6 + device pci 17.3 on + chip drivers/i2c/generic + register "hid" = ""ELAN0001"" + register "desc" = ""ELAN Touchscreen"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)" + register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)" + register "reset_delay_ms" = "20" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)" + register "enable_delay_ms" = "1" + register "has_power_resource" = "1" + device i2c 10 on end + end + end # - I2C 7 + end + + # Disable compliance mode + register "DisableComplianceMode" = "1" +end
Hello Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31860
to look at the new patch set (#2).
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
mb/google/octopus: Create Bloog variant
This commit create bloog variant for Octopus. Initial settings are copy from meep. Remove I2C tuning, WACOM digitizer and WEIDA touchscreen.
BUG=b:127736039 BRANCH=octopus TEST=None
Change-Id: I1d04c97cb0622075a25825ba2c835d556c8b0423 Signed-off-by: Tony Huang tony-huang@quanta.corp-partner.google.com --- M src/mainboard/google/octopus/Kconfig M src/mainboard/google/octopus/Kconfig.name A src/mainboard/google/octopus/variants/bloog/Makefile.inc A src/mainboard/google/octopus/variants/bloog/gpio.c A src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl A src/mainboard/google/octopus/variants/bloog/include/variant/ec.h A src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h A src/mainboard/google/octopus/variants/bloog/overridetree.cb 8 files changed, 201 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/31860/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31860 )
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/bloog/gpio.c:
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... PS2, Line 4: 2018 2019
Justin TerAvest has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31860 )
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
Patch Set 2: Code-Review+1
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31860 )
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
Patch Set 2:
(3 comments)
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h:
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... PS2, Line 4: * Copyright 2018 Google LLC Furquan has already mentioned in one of the other files. Copyright year 2019 instead of 2018 where the copyright marking is added.
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/bloog/overridetree.cb:
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... PS2, Line 43: I believe the gSPI config for TPM communication can be added. I am not sure if you are waiting to tune it before adding here.
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... PS2, Line 45: device pci 16.0 off end # - I2C 0 It seems PEN is not present. If so, can you please the concerned GPIOs as NC. Here are the GPIOs for your reference: GPIO_50, GPIO_51, GPIO_52, GPIO_53, GPIO_138, GPIO_139, GPIO_140, GPIO_144, GPIO_145.
Same about LTE GPIOs.
Hello Karthik Ramasubramanian, Wisley Chen, Justin TerAvest, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31860
to look at the new patch set (#3).
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
mb/google/octopus: Create Bloog variant
This commit create bloog variant for Octopus. Initial settings are copy from meep. Remove I2C tuning, WACOM digitizer and WEIDA touchscreen. Override GPIO configuration for unused LTE and Pen.
BUG=b:127736039 BRANCH=octopus TEST=None
Change-Id: I1d04c97cb0622075a25825ba2c835d556c8b0423 Signed-off-by: Tony Huang tony-huang@quanta.corp-partner.google.com --- M src/mainboard/google/octopus/Kconfig M src/mainboard/google/octopus/Kconfig.name A src/mainboard/google/octopus/variants/bloog/Makefile.inc A src/mainboard/google/octopus/variants/bloog/gpio.c A src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl A src/mainboard/google/octopus/variants/bloog/include/variant/ec.h A src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h A src/mainboard/google/octopus/variants/bloog/overridetree.cb 8 files changed, 235 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/31860/3
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31860 )
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/#/c/31860/3/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/bloog/gpio.c:
https://review.coreboot.org/#/c/31860/3/src/mainboard/google/octopus/variant... PS3, Line 23: PAD_NC(GPIO_50, UP_20K), /* PCH_I2C_PEN_SDA -- unused */ code indent should use tabs where possible
https://review.coreboot.org/#/c/31860/3/src/mainboard/google/octopus/variant... PS3, Line 23: PAD_NC(GPIO_50, UP_20K), /* PCH_I2C_PEN_SDA -- unused */ please, no spaces at the start of a line
Hello Karthik Ramasubramanian, Wisley Chen, Justin TerAvest, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31860
to look at the new patch set (#4).
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
mb/google/octopus: Create Bloog variant
This commit create bloog variant for Octopus. Initial settings are copy from meep. Remove I2C tuning, WACOM digitizer and WEIDA touchscreen. Override GPIO configuration for unused LTE and Pen.
BUG=b:127736039 BRANCH=octopus TEST=None
Change-Id: I1d04c97cb0622075a25825ba2c835d556c8b0423 Signed-off-by: Tony Huang tony-huang@quanta.corp-partner.google.com --- M src/mainboard/google/octopus/Kconfig M src/mainboard/google/octopus/Kconfig.name A src/mainboard/google/octopus/variants/bloog/Makefile.inc A src/mainboard/google/octopus/variants/bloog/gpio.c A src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl A src/mainboard/google/octopus/variants/bloog/include/variant/ec.h A src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h A src/mainboard/google/octopus/variants/bloog/overridetree.cb 8 files changed, 235 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/31860/4
Tony Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31860 )
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
Patch Set 4:
(4 comments)
Hi Justin and Karthik, I uploaded new patchset, please help review. Thanks
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/bloog/gpio.c:
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... PS2, Line 4: 2018
2019
Done
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h:
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... PS2, Line 4: * Copyright 2018 Google LLC
Furquan has already mentioned in one of the other files. […]
Done
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... File src/mainboard/google/octopus/variants/bloog/overridetree.cb:
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... PS2, Line 43:
I believe the gSPI config for TPM communication can be added. […]
Done
https://review.coreboot.org/#/c/31860/2/src/mainboard/google/octopus/variant... PS2, Line 45: device pci 16.0 off end # - I2C 0
It seems PEN is not present. If so, can you please the concerned GPIOs as NC. […]
Done, set GPIO as NC for LTE and PEN.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31860 )
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
Patch Set 4: Code-Review+2
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31860 )
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31860 )
Change subject: mb/google/octopus: Create Bloog variant ......................................................................
mb/google/octopus: Create Bloog variant
This commit create bloog variant for Octopus. Initial settings are copy from meep. Remove I2C tuning, WACOM digitizer and WEIDA touchscreen. Override GPIO configuration for unused LTE and Pen.
BUG=b:127736039 BRANCH=octopus TEST=None
Change-Id: I1d04c97cb0622075a25825ba2c835d556c8b0423 Signed-off-by: Tony Huang tony-huang@quanta.corp-partner.google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/31860 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Karthik Ramasubramanian kramasub@google.com --- M src/mainboard/google/octopus/Kconfig M src/mainboard/google/octopus/Kconfig.name A src/mainboard/google/octopus/variants/bloog/Makefile.inc A src/mainboard/google/octopus/variants/bloog/gpio.c A src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl A src/mainboard/google/octopus/variants/bloog/include/variant/ec.h A src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h A src/mainboard/google/octopus/variants/bloog/overridetree.cb 8 files changed, 235 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved
diff --git a/src/mainboard/google/octopus/Kconfig b/src/mainboard/google/octopus/Kconfig index 8c13961..6dd062a 100644 --- a/src/mainboard/google/octopus/Kconfig +++ b/src/mainboard/google/octopus/Kconfig @@ -58,6 +58,7 @@ default "meep" if BOARD_GOOGLE_MEEP default "ampton" if BOARD_GOOGLE_AMPTON default "casta" if BOARD_GOOGLE_CASTA + default "bloog" if BOARD_GOOGLE_BLOOG default "octopus" if BOARD_GOOGLE_OCTOPUS
config DEVICETREE @@ -78,6 +79,7 @@ default "Meep" if BOARD_GOOGLE_MEEP default "Ampton" if BOARD_GOOGLE_AMPTON default "Casta" if BOARD_GOOGLE_CASTA + default "Bloog" if BOARD_GOOGLE_BLOOG default "Octopus" if BOARD_GOOGLE_OCTOPUS
config MAINBOARD_FAMILY @@ -95,6 +97,7 @@ default "MEEP TEST 1118" if BOARD_GOOGLE_MEEP default "AMPTON TEST 1285" if BOARD_GOOGLE_AMPTON default "CASTA TEST 8105" if BOARD_GOOGLE_CASTA + default "BLOOG TEST 2509" if BOARD_GOOGLE_BLOOG default "OCTOPUS TEST 6859" if BOARD_GOOGLE_OCTOPUS
config MAX_CPUS @@ -126,12 +129,14 @@ default y if BOARD_GOOGLE_FLEEX default y if BOARD_GOOGLE_BOBBA default y if BOARD_GOOGLE_CASTA + default y if BOARD_GOOGLE_BLOOG
config DRAM_PART_NUM_ALWAYS_IN_CBI bool depends on DRAM_PART_NUM_IN_CBI default y if BOARD_GOOGLE_AMPTON default y if BOARD_GOOGLE_CASTA + default y if BOARD_GOOGLE_BLOOG
config DRAM_PART_IN_CBI_BOARD_ID_MIN int diff --git a/src/mainboard/google/octopus/Kconfig.name b/src/mainboard/google/octopus/Kconfig.name index 498da36..adc7060 100644 --- a/src/mainboard/google/octopus/Kconfig.name +++ b/src/mainboard/google/octopus/Kconfig.name @@ -52,3 +52,9 @@ select BASEBOARD_OCTOPUS_LAPTOP select BOARD_GOOGLE_BASEBOARD_OCTOPUS select NHLT_DA7219 if INCLUDE_NHLT_BLOBS + +config BOARD_GOOGLE_BLOOG + bool "-> Bloog" + select BASEBOARD_OCTOPUS_LAPTOP + select BOARD_GOOGLE_BASEBOARD_OCTOPUS + select NHLT_DA7219 if INCLUDE_NHLT_BLOBS diff --git a/src/mainboard/google/octopus/variants/bloog/Makefile.inc b/src/mainboard/google/octopus/variants/bloog/Makefile.inc new file mode 100644 index 0000000..9fb63f5 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/Makefile.inc @@ -0,0 +1,3 @@ +bootblock-y += gpio.c + +ramstage-y += gpio.c diff --git a/src/mainboard/google/octopus/variants/bloog/gpio.c b/src/mainboard/google/octopus/variants/bloog/gpio.c new file mode 100644 index 0000000..2b29cba --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/gpio.c @@ -0,0 +1,54 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <gpio.h> +#include <soc/gpio.h> + +static const struct pad_config default_override_table[] = { + + PAD_NC(GPIO_50, UP_20K), /* PCH_I2C_PEN_SDA -- unused */ + PAD_NC(GPIO_51, UP_20K), /* PCH_I2C_PEN_SCL -- unused */ + PAD_NC(GPIO_52, UP_20K), /* PCH_I2C_P_SENSOR_SDA -- unused */ + PAD_NC(GPIO_53, UP_20K), /* PCH_I2C_P_SENSOR_SCL -- unused */ + + PAD_NC(GPIO_67, UP_20K), /* EN_PP3300_DX_LTE_SOC -- unused */ + + PAD_NC(GPIO_117, UP_20K), /* PCIE_WAKE1_B -- LTE_WAKE_L - No LTE*/ + + PAD_NC(GPIO_138, UP_20K), /* PEN_PDCT_ODL -- unused */ + PAD_NC(GPIO_139, UP_20K), /* PEN_INT_ODL -- unused */ + PAD_NC(GPIO_140, UP_20K), /* PEN_RESET -- unused */ + + PAD_NC(GPIO_143, UP_20K), /* LTE_SAR_ODL -- unused */ + PAD_NC(GPIO_144, UP_20K), /* PEN_EJECT(wake) -- unused */ + PAD_NC(GPIO_145, UP_20K), /* PEN_EJECT(notification) -- unused */ + + PAD_NC(GPIO_161, UP_20K), /* LTE_OFF_ODL -- unused */ + + /* EN_PP3300_TOUCHSCREEN */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_146, 0, DEEP, NONE, Tx0RxDCRx0, + DISPUPD), + + /* EN_PP3300_WLAN_L */ + PAD_CFG_GPO(GPIO_178, 0, DEEP), +}; + +const struct pad_config *variant_override_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(default_override_table); + return default_override_table; +} diff --git a/src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl b/src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl new file mode 100644 index 0000000..4f6497a --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/include/variant/acpi/dptf.asl @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <baseboard/acpi/dptf.asl> diff --git a/src/mainboard/google/octopus/variants/bloog/include/variant/ec.h b/src/mainboard/google/octopus/variants/bloog/include/variant/ec.h new file mode 100644 index 0000000..260d7d4 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/include/variant/ec.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h b/src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h new file mode 100644 index 0000000..750b0d4 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/include/variant/gpio.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#ifndef MAINBOARD_GPIO_H +#define MAINBOARD_GPIO_H + +#include <baseboard/gpio.h> + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/octopus/variants/bloog/overridetree.cb b/src/mainboard/google/octopus/variants/bloog/overridetree.cb new file mode 100644 index 0000000..20b5dd3 --- /dev/null +++ b/src/mainboard/google/octopus/variants/bloog/overridetree.cb @@ -0,0 +1,109 @@ +chip soc/intel/apollolake + + # EMMC Tx CMD Delay + # Refer to EDS-Vol2-16.32. + # [14:8] steps of delay for DDR mode, each 125ps. + # [6:0] steps of delay for SDR mode, each 125ps. + register "emmc_tx_cmd_cntl" = "0x505" + + # EMMC TX DATA Delay 1 + # Refer to EDS-Vol2-16.33. + # [14:8] steps of delay for HS400, each 125ps. + # [6:0] steps of delay for SDR104/HS200, each 125ps. + register "emmc_tx_data_cntl1" = "0x0b0d" + + # EMMC TX DATA Delay 2 + # Refer to EDS-Vol2-16.34. + # [30:24] steps of delay for SDR50, each 125ps. + # [22:16] steps of delay for DDR50, each 125ps. + # [14:8] steps of delay for SDR25/HS50, each 125ps. + # [6:0] steps of delay for SDR12, each 125ps. + register "emmc_tx_data_cntl2" = "0x1c2a2a2a" + + # EMMC RX CMD/DATA Delay 1 + # Refer to EDS-Vol2-16.35. + # [30:24] steps of delay for SDR50, each 125ps. + # [22:16] steps of delay for DDR50, each 125ps. + # [14:8] steps of delay for SDR25/HS50, each 125ps. + # [6:0] steps of delay for SDR12, each 125ps. + register "emmc_rx_cmd_data_cntl1" = "0x00171a1a" + + # EMMC RX CMD/DATA Delay 2 + # Refer to EDS-Vol2-16.37. + # [17:16] stands for Rx Clock before Output Buffer + # [14:8] steps of delay for Auto Tuning Mode, each 125ps. + # [6:0] steps of delay for HS200, each 125ps. + register "emmc_rx_cmd_data_cntl2" = "0x10028" + + # EMMC Rx Strobe Delay + # Refer to EDS-Vol2-16.36. + # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps. + # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps. + register "emmc_rx_strobe_cntl" = "0x0b0b" + + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| GSPI0 | cr50 TPM. Early init is | + #| | required to set up a BAR | + #| | for TPM communication | + #| | before memory is up | + #+-------------------+---------------------------+ + register "common_soc_config" = "{ + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + }" + + device domain 0 on + device pci 16.0 off end # - I2C 0 + device pci 17.1 on + chip drivers/i2c/da7219 + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPIO_137_IRQ)" + register "btn_cfg" = "50" + register "mic_det_thr" = "500" + register "jack_ins_deb" = "20" + register "jack_det_rate" = ""32ms_64ms"" + register "jack_rem_deb" = "1" + register "a_d_btn_thr" = "0xa" + register "d_b_btn_thr" = "0x16" + register "b_c_btn_thr" = "0x21" + register "c_mic_btn_thr" = "0x3e" + register "btn_avg" = "4" + register "adc_1bit_rpt" = "1" + register "micbias_lvl" = "2600" + register "mic_amp_in_sel" = ""diff"" + device i2c 1a on end + end + end # - I2C 5 + device pci 17.2 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPIO_135_IRQ)" + register "wake" = "GPE0_DW3_27" + register "probed" = "1" + device i2c 15 on end + end + end # - I2C 6 + device pci 17.3 on + chip drivers/i2c/generic + register "hid" = ""ELAN0001"" + register "desc" = ""ELAN Touchscreen"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPIO_212_IRQ)" + register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_105)" + register "reset_delay_ms" = "20" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_146)" + register "enable_delay_ms" = "1" + register "has_power_resource" = "1" + device i2c 10 on end + end + end # - I2C 7 + end + + # Disable compliance mode + register "DisableComplianceMode" = "1" +end
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