Wonkyu Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76123?usp=email )
Change subject: intel/common/block/cpu: add cpu clock measure api ......................................................................
intel/common/block/cpu: add cpu clock measure api
Measure current cpu frequency by using actual performance clock counter.
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I0dd6483e0be5c48fc3da2227b979882b394429c4 --- M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h M src/soc/intel/common/block/include/intelblocks/msr.h 3 files changed, 18 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/76123/1
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index c317e05..4a58ac9 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -8,6 +8,7 @@ #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> +#include <delay.h> #include <intelblocks/cpulib.h> #include <intelblocks/fast_spi.h> #include <intelblocks/msr.h> @@ -15,6 +16,7 @@ #include <soc/soc_chip.h> #include <types.h>
+ #define CPUID_PROCESSOR_FREQUENCY 0X16 #define CPUID_HYBRID_INFORMATION 0x1a
@@ -515,3 +517,15 @@ msr.lo = msr.lo | DISABLE_CPU_ERROR; wrmsr(MSR_PREFETCH_CTL, msr); } + +uint32_t cpu_get_measured_freq_mhz(void) +{ + msr_t msr; + + msr.hi = 0; + msr.lo = 0; + wrmsr(MSR_IA32_APERF, msr); + udelay(100); + msr = rdmsr(MSR_IA32_APERF); + return msr.lo; +} diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index cbc9e44..968700a 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -225,4 +225,7 @@ */ void disable_three_strike_error(void);
+/* This function meausres current cpu frequency */ +uint32_t cpu_get_measured_freq_mhz(void); + #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */ diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h index 9f95e9f..36b5327 100644 --- a/src/soc/intel/common/block/include/intelblocks/msr.h +++ b/src/soc/intel/common/block/include/intelblocks/msr.h @@ -17,6 +17,7 @@ #define MSR_BIOS_UPGD_TRIG 0x7a #define SGX_ACTIVATE_BIT (1) #define MSR_PMG_IO_CAPTURE_BASE 0xe4 +#define MSR_IA32_APERF 0xe8 #define MSR_EMULATE_PM_TIMER 0x121 #define EMULATE_DELAY_OFFSET_VALUE 20 #define EMULATE_PM_TMR_EN (1 << 16)