[M] Change in coreboot[main]: mb/amd/birman: Add Birmanplus board variant related configs - coreboot-gerrit

6 Feb 2024

Anand Vaikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80353?usp=email )
Change subject: mb/amd/birman: Add Birmanplus board variant related configs
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mb/amd/birman: Add Birmanplus board variant related configs
Initial commit for upstreaming Birmanplus mainboard changes.
Change-Id: I075dcf0214f8dc8b33b0e429d83d270b2f0952e1
Signed-off-by: Anand Vaikar a.vaikar2021@gmail.com
---
M src/mainboard/amd/birman/Kconfig
M src/mainboard/amd/birman/Kconfig.name
M src/mainboard/amd/birman/Makefile.mk
A src/mainboard/amd/birman/variants/birmanplus/port_descriptors.c
4 files changed, 216 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/80353/1

diff --git a/src/mainboard/amd/birman/Kconfig b/src/mainboard/amd/birman/Kconfig
index 9fafae1..991d557 100644
--- a/src/mainboard/amd/birman/Kconfig
+++ b/src/mainboard/amd/birman/Kconfig
@@ -27,6 +27,10 @@
    select BOARD_AMD_BIRMAN_COMMON
    select SOC_AMD_GLINDA
+config BOARD_AMD_BIRMANPLUS_PHOENIX
+	select BOARD_AMD_BIRMAN_COMMON
+	select SOC_AMD_PHOENIX_FSP
+
 if BOARD_AMD_BIRMAN_COMMON
config FMDFILE
@@ -38,14 +42,18 @@
 config MAINBOARD_DIR
    default "amd/birman"
+config VARIANT_DIR
+	default "birmanplus" if BOARD_AMD_BIRMANPLUS_PHOENIX
+
 config MAINBOARD_PART_NUMBER
    default "Birman_Glinda" if BOARD_AMD_BIRMAN_GLINDA
    default "Birman_Phoenix_FSP" if BOARD_AMD_BIRMAN_PHOENIX_FSP
    default "Birman_Phoenix_openSIL" if BOARD_AMD_BIRMAN_PHOENIX_OPENSIL
+	default "Birmanplus_Phoenix" if BOARD_AMD_BIRMANPLUS_PHOENIX
config DEVICETREE
    default "devicetree_glinda.cb" if BOARD_AMD_BIRMAN_GLINDA
-	default "devicetree_phoenix_fsp.cb" if BOARD_AMD_BIRMAN_PHOENIX_FSP
+	default "devicetree_phoenix_fsp.cb" if BOARD_AMD_BIRMAN_PHOENIX_FSP || BOARD_AMD_BIRMANPLUS_PHOENIX
    default "devicetree_phoenix_opensil.cb" if BOARD_AMD_BIRMAN_PHOENIX_OPENSIL
config BIRMAN_HAVE_MCHP_FW
diff --git a/src/mainboard/amd/birman/Kconfig.name b/src/mainboard/amd/birman/Kconfig.name
index 6daea88..ef50099 100644
--- a/src/mainboard/amd/birman/Kconfig.name
+++ b/src/mainboard/amd/birman/Kconfig.name
@@ -6,5 +6,8 @@
 config BOARD_AMD_BIRMAN_PHOENIX_OPENSIL
    bool "->  Birman for Phoenix SoC using openSIL"
+config BOARD_AMD_BIRMANPLUS_PHOENIX
+	bool "->  BirmanPlus for Phoenix SoC"
+
 config BOARD_AMD_BIRMAN_GLINDA
    bool "->  Birman for Glinda SoC"
diff --git a/src/mainboard/amd/birman/Makefile.mk b/src/mainboard/amd/birman/Makefile.mk
index 6c417ce..ced4a74 100644
--- a/src/mainboard/amd/birman/Makefile.mk
+++ b/src/mainboard/amd/birman/Makefile.mk
@@ -5,11 +5,13 @@
 bootblock-y += ec.c
romstage-$(CONFIG_BOARD_AMD_BIRMAN_PHOENIX_FSP) += port_descriptors_phoenix.c
+romstage-$(CONFIG_BOARD_AMD_BIRMANPLUS_PHOENIX) += variants/$(VARIANT_DIR)/port_descriptors.c
 romstage-$(CONFIG_BOARD_AMD_BIRMAN_GLINDA) += port_descriptors_glinda.c
ramstage-y += chromeos.c
 ramstage-y += gpio.c
 ramstage-$(CONFIG_BOARD_AMD_BIRMAN_PHOENIX_FSP) += port_descriptors_phoenix.c
+ramstage-$(CONFIG_BOARD_AMD_BIRMANPLUS_PHOENIX) += variants/$(VARIANT_DIR)/port_descriptors.c
 ramstage-$(CONFIG_BOARD_AMD_BIRMAN_GLINDA) += port_descriptors_glinda.c
ifneq ($(wildcard $(MAINBOARD_BLOBS_DIR)/APCB_FP8_LPDDR5.bin),)
diff --git a/src/mainboard/amd/birman/variants/birmanplus/port_descriptors.c b/src/mainboard/amd/birman/variants/birmanplus/port_descriptors.c
new file mode 100644
index 0000000..b7dc7c9
--- /dev/null
+++ b/src/mainboard/amd/birman/variants/birmanplus/port_descriptors.c
@@ -0,0 +1,202 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <device/i2c_simple.h>
+#include <gpio.h>
+#include <soc/platform_descriptors.h>
+#include <soc/soc_util.h>
+#include <types.h>
+
+#define phx_mxm_dxio_descriptor {			\
+	.engine_type = PCIE_ENGINE,			\
+	.port_present = CONFIG(ENABLE_EVAL_CARD),	\
+	.start_lane = 0,				\
+	.end_lane = 7,					\
+	.device_number = 1,				\
+	.function_number = 1,				\
+	.link_speed_capability = GEN_MAX,			\
+	.turn_off_unused_lanes = true,			\
+	.link_aspm = ASPM_L1,				\
+	.link_hotplug = HOTPLUG_DISABLED,		\
+	.clk_req = CLK_REQ0,				\
+	.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}, \
+}
+
+#define ssd0_dxio_descriptor {				\
+	.engine_type = PCIE_ENGINE,			\
+	.port_present = true,				\
+	.start_lane = 16,				\
+	.end_lane = 19,					\
+	.device_number = 2,				\
+	.function_number = 4,				\
+	.link_speed_capability = GEN_MAX,			\
+	.turn_off_unused_lanes = true,			\
+	.link_aspm = ASPM_L1,				\
+	.link_hotplug = HOTPLUG_DISABLED,		\
+	.clk_req = CLK_REQ2, \
+	.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}, \
+}
+
+#define wlan_dxio_descriptor {				\
+	.engine_type = PCIE_ENGINE,			\
+	.port_present = true,				\
+	.start_lane = 15,				\
+	.end_lane = 15,		\
+	.device_number = 2,				\
+	.function_number = 2,				\
+	.link_speed_capability = GEN_MAX,			\
+	.turn_off_unused_lanes = true,			\
+	.link_aspm = ASPM_L1,				\
+	.link_hotplug = HOTPLUG_DISABLED,		\
+	.clk_req = CLK_REQ3,				\
+}
+
+#define phx_ssd1_dxio_descriptor {			\
+	.engine_type = PCIE_ENGINE,			\
+	.port_present = true,		\
+	.start_lane = 8,				\
+	.end_lane = 11,					\
+	.device_number = 1,				\
+	.function_number = 2,				\
+	.link_speed_capability = GEN_MAX,			\
+	.turn_off_unused_lanes = true,			\
+	.link_aspm = ASPM_L1,				\
+	.link_hotplug = HOTPLUG_DISABLED,		\
+	.clk_req = CLK_REQ1,				\
+	.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}, \
+}
+
+#define wwan_dxio_descriptor {				\
+	.engine_type = PCIE_ENGINE,			\
+	.port_present = true,				\
+	.start_lane = 12,				\
+	.end_lane = 12,		\
+	.device_number = 2,				\
+	.function_number = 3,				\
+	.link_speed_capability = GEN_MAX,			\
+	.turn_off_unused_lanes = true,			\
+	.link_aspm = ASPM_L1,				\
+	.link_hotplug = HOTPLUG_DISABLED,		\
+	.clk_req = CLK_REQ4,				\
+	.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}, \
+}
+
+#define gbe_dxio_descriptor {				\
+	.engine_type = PCIE_ENGINE,			\
+	.port_present = true,				\
+	.start_lane = 13,				\
+	.end_lane = 13,					\
+	.device_number = 1,				\
+	.function_number = 3,				\
+	.link_speed_capability = GEN_MAX,			\
+	.turn_off_unused_lanes = true,			\
+	.link_aspm = ASPM_L1,				\
+	.link_hotplug = HOTPLUG_DISABLED,		\
+	.clk_req = CLK_REQ6,				\
+	.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}, \
+}
+
+#define sd_dxio_descriptor {				\
+	.engine_type = PCIE_ENGINE,			\
+	.port_present = false,				\
+	.start_lane = 14,				\
+	.end_lane = 14,					\
+	.device_number = 2,				\
+	.function_number = 1,				\
+	.link_speed_capability = GEN_MAX,			\
+	.turn_off_unused_lanes = true,			\
+	.link_aspm = ASPM_L1,				\
+	.link_hotplug = HOTPLUG_DISABLED,		\
+	.clk_req = CLK_REQ5,				\
+	.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133}, \
+}
+
+static fsp_ddi_descriptor birmanplus_ddi_descriptors[] = {
+	{ /* DDI0 - eDP */
+		.connector_type = DDI_EDP,
+		.aux_index = DDI_AUX1,
+		.hdp_index = DDI_HDP1
+	},
+	{ /* DDI1 - HDMI/DP */
+		.connector_type = DDI_HDMI,
+		.aux_index = DDI_AUX2,
+		.hdp_index = DDI_HDP2
+	},
+	{ /* DDI2 - DP (type C) */
+		.connector_type = DDI_DP_W_TYPEC,
+		.aux_index = DDI_AUX3,
+		.hdp_index = DDI_HDP3,
+	},
+	{ /* DDI3 - DP (type C) */
+		.connector_type = DDI_DP_W_TYPEC,
+		.aux_index = DDI_AUX4,
+		.hdp_index = DDI_HDP4,
+	},
+	{ /* DDI4 - DP (type C) */
+		.connector_type = DDI_DP_W_TYPEC,
+		.aux_index = DDI_AUX5,
+		.hdp_index = DDI_HDP5,
+	}
+};
+
+static uint8_t get_ddi1_type(void)
+{
+	const uint8_t eeprom_i2c_bus = 2;
+	const uint8_t eeprom_i2c_address = 0x55;
+	const uint16_t eeprom_connector_type_offset = 2;
+	uint8_t eeprom_connector_type_data[2];
+	uint16_t connector_type;
+
+	if (i2c_2ba_read_bytes(eeprom_i2c_bus, eeprom_i2c_address,
+			       eeprom_connector_type_offset, eeprom_connector_type_data,
+			       sizeof(eeprom_connector_type_data))) {
+		printk(BIOS_NOTICE,
+		       "Display connector type couldn't be determined. Disabling DDI1.\n");
+		return DDI_UNUSED_TYPE;
+	}
+
+	connector_type = eeprom_connector_type_data[1] | eeprom_connector_type_data[0] << 8;
+
+	switch (connector_type) {
+	case 0x0c:
+		printk(BIOS_DEBUG, "Configuring DDI1 as HDMI.\n");
+		return DDI_HDMI;
+	case 0x13:
+		printk(BIOS_DEBUG, "Configuring DDI1 as DP.\n");
+		return DDI_DP;
+	case 0x14:
+		printk(BIOS_DEBUG, "Configuring DDI1 as eDP.\n");
+		return DDI_EDP;
+	case 0x17:
+		printk(BIOS_DEBUG, "Configuring DDI1 as USB-C.\n");
+		return DDI_DP_W_TYPEC;
+	default:
+		printk(BIOS_WARNING, "Unexpected display connector type %x. Disabling DDI1.\n",
+		       connector_type);
+		return DDI_UNUSED_TYPE;
+	}
+}
+
+
+void mainboard_get_dxio_ddi_descriptors(
+		const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num,
+		const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num)
+{
+	birmanplus_ddi_descriptors[1].connector_type = get_ddi1_type();
+
+	printk(BIOS_DEBUG, "Using Birmanplus PHX DXIO\n");
+	static const fsp_dxio_descriptor birmanplus_phx_dxio_descriptors[] = {
+		phx_mxm_dxio_descriptor,
+		ssd0_dxio_descriptor,
+		wlan_dxio_descriptor,
+		phx_ssd1_dxio_descriptor,
+		wwan_dxio_descriptor,
+		gbe_dxio_descriptor,
+		sd_dxio_descriptor,
+	};
+
+	*dxio_descs = birmanplus_phx_dxio_descriptors;
+	*dxio_num = ARRAY_SIZE(birmanplus_phx_dxio_descriptors);
+	*ddi_descs = birmanplus_ddi_descriptors;
+	*ddi_num = ARRAY_SIZE(birmanplus_ddi_descriptors);
+}
-- 
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I075dcf0214f8dc8b33b0e429d83d270b2f0952e1
Gerrit-Change-Number: 80353
Gerrit-PatchSet: 1
Gerrit-Owner: Anand Vaikar a.vaikar2021@gmail.com
Gerrit-MessageType: newchange



    