Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu.
Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85751?usp=email )
Change subject: soc/mediatek/mt8196: Set SPMI-P SCL/SDA SoC PD
......................................................................
Patch Set 8:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85751/comment/dcafbc05_4ef6fac9?usp... :
PS8, Line 7: SoC PD
pins to pull-down.
https://review.coreboot.org/c/coreboot/+/85751/comment/1fa268fc_44c5a47e?usp... :
PS8, Line 9: ,
SoC side.
https://review.coreboot.org/c/coreboot/+/85751/comment/2cb8855b_fa6fe7fa?usp... :
PS8, Line 10: it is done only once during the SPMI read check to fix SPMI clock
: calibration failure.
Can you explain why ?
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