Tristan Corrick has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30078
Change subject: sb/intel/lynxpoint/pcie.c: Fix a mistake in a comment ......................................................................
sb/intel/lynxpoint/pcie.c: Fix a mistake in a comment
The code annotated by the comment is dealing with root port 7, so update the comment to reflect that. It looks like the comment was copied from the root port 3 case, but not updated.
Change-Id: I0e27e4453f4c3b2b1b9dffb0c89b71373c6b303e Signed-off-by: Tristan Corrick tristan@corrick.kiwi --- M src/southbridge/intel/lynxpoint/pcie.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/30078/1
diff --git a/src/southbridge/intel/lynxpoint/pcie.c b/src/southbridge/intel/lynxpoint/pcie.c index ca76aae..231f3e7 100644 --- a/src/southbridge/intel/lynxpoint/pcie.c +++ b/src/southbridge/intel/lynxpoint/pcie.c @@ -394,7 +394,7 @@ case 7: if (is_lp) break; - /* Root Port 3 is disabled in config 11b (1x4 links). */ + /* Root Port 7 is disabled in config 11b (1x4 links). */ if (((rpc.strpfusecfg2 >> 14) & 0x3) == 0x3) { root_port_mark_disable(dev); return;