Change in coreboot[master]: [UNTESTED] sb/intel/bd82x6x: Replace `write_iobp`
Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49177 ) Change subject: [UNTESTED] sb/intel/bd82x6x: Replace `write_iobp` ...................................................................... [UNTESTED] sb/intel/bd82x6x: Replace `write_iobp` Use the already-existing `pch_iobp_update` function instead. Only update individual fields, like reference code does. Several replay issues still remain, and have been marked with comments. Follow-ups will handle them. Change-Id: I5b95134a504d693f8e6f2df35784bf75037b7b16 Signed-off-by: Angel Pons <th3fanbus@gmail.com> --- M src/southbridge/intel/bd82x6x/early_pch.c 1 file changed, 71 insertions(+), 94 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/49177/1 diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c index 903dc01..0b60d13 100644 --- a/src/southbridge/intel/bd82x6x/early_pch.c +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -16,41 +16,6 @@ #include "pch.h" #include "chip.h" -static void wait_iobp(void) -{ - while (RCBA8(IOBPS) & 1) - ; // implement timeout? -} - -static u32 read_iobp(u32 address) -{ - u32 ret; - - RCBA32(IOBPIRI) = address; - RCBA16(IOBPS) = (RCBA16(IOBPS) & 0x1ff) | 0x600; - wait_iobp(); - ret = RCBA32(IOBPD); - wait_iobp(); - RCBA8(IOBPS); // call wait_iobp() instead here? - return ret; -} - -static void write_iobp(u32 address, u32 val) -{ - /* this function was probably pch_iobp_update with the andvalue - * being 0. So either the IOBP read can be removed or this function - * and the pch_iobp_update function in ramstage could be merged */ - read_iobp(address); - RCBA16(IOBPS) = (RCBA16(IOBPS) & 0x1ff) | 0x600; - wait_iobp(); - - RCBA32(IOBPD) = val; - wait_iobp(); - RCBA16(IOBPS) = (RCBA16(IOBPS) & 0x1ff) | 0x600; - - RCBA8(IOBPS); // call wait_iobp() instead here? -} - void early_pch_init_native_dmi_pre(void) { /* Link Capabilities Register */ @@ -184,67 +149,79 @@ pch_assign_pcie_lane_mapping(); - write_iobp(0xea007f62, 0x00590133); - write_iobp(0xec007f62, 0x00590133); - write_iobp(0xec007f64, 0x59555588); - write_iobp(0xea0040b9, 0x0001051c); - write_iobp(0xeb0040a1, 0x800084ff); - write_iobp(0xec0040a1, 0x800084ff); - write_iobp(0xea004001, 0x00008400); - write_iobp(0xeb004002, 0x40201758); - write_iobp(0xec004002, 0x40201758); - write_iobp(0xea004002, 0x00601758); - write_iobp(0xea0040a1, 0x810084ff); - write_iobp(0xeb0040b1, 0x0001c598); - write_iobp(0xec0040b1, 0x0001c598); - write_iobp(0xeb0040b6, 0x0001c598); - write_iobp(0xea0000a9, 0x80ff969f); - write_iobp(0xea0001a9, 0x80ff969f); - write_iobp(0xeb0040b2, 0x0001c396); - write_iobp(0xeb0040b3, 0x0001c396); - write_iobp(0xec0040b2, 0x0001c396); - write_iobp(0xea0001a9, 0x80ff94ff); - write_iobp(SATA_IOBP_SP0G3IR, 0x0088037f); - write_iobp(0xea0000a9, 0x80ff94ff); - write_iobp(SATA_IOBP_SP1G3IR, 0x0088037f); + pch_iobp_update(0xea007f62, ~(0xff << 16), 0x59 << 16); + pch_iobp_update(0xec007f62, ~(0xff << 16), 0x59 << 16); + pch_iobp_update(0xec007f64, ~(0xf << 24), 0x9 << 24); + pch_iobp_update(0xea0040b9, ~0xffff, 0x051c); + pch_iobp_update(0xeb0040a1, ~(0x3ff << 3), 0x9f << 3); + pch_iobp_update(0xec0040a1, ~(0x3ff << 3), 0x9f << 3); - write_iobp(0xea007f05, 0x00010642); - write_iobp(0xea0040b7, 0x0001c91c); - write_iobp(0xea0040b8, 0x0001c91c); - write_iobp(0xeb0040a1, 0x820084ff); - write_iobp(0xec0040a1, 0x820084ff); - write_iobp(0xea007f0a, 0xc2480000); + /* Some CPT-only writes go here */ - write_iobp(0xec00404d, 0x1ff177f); - write_iobp(0xec000084, 0x5a600000); - write_iobp(0xec000184, 0x5a600000); - write_iobp(0xec000284, 0x5a600000); - write_iobp(0xec000384, 0x5a600000); - write_iobp(0xec000094, 0x000f0501); - write_iobp(0xec000194, 0x000f0501); - write_iobp(0xec000294, 0x000f0501); - write_iobp(0xec000394, 0x000f0501); - write_iobp(0xec000096, 0x00000001); - write_iobp(0xec000196, 0x00000001); - write_iobp(0xec000296, 0x00000001); - write_iobp(0xec000396, 0x00000001); - write_iobp(0xec000001, 0x00008c08); - write_iobp(0xec000101, 0x00008c08); - write_iobp(0xec000201, 0x00008c08); - write_iobp(0xec000301, 0x00008c08); - write_iobp(0xec0040b5, 0x0001c518); - write_iobp(0xec000087, 0x06077597); - write_iobp(0xec000187, 0x06077597); - write_iobp(0xec000287, 0x06077597); - write_iobp(0xec000387, 0x06077597); - write_iobp(0xea000050, 0x00bb0157); - write_iobp(0xea000150, 0x00bb0157); - write_iobp(0xec007f60, 0x77777d77); - write_iobp(0xea00008d, 0x01320000); - write_iobp(0xea00018d, 0x01320000); - write_iobp(0xec0007b2, 0x04514b5e); - write_iobp(0xec00078c, 0x40000200); - write_iobp(0xec000780, 0x02000020); + pch_iobp_update(0xea004001, ~(3 << 10), 1 << 10); + pch_iobp_update(0xeb004002, ~0, 1 << 30 | 1 << 21); + pch_iobp_update(0xec004002, ~0, 1 << 30 | 1 << 21); + pch_iobp_update(0xea004002, ~0, 1 << 22 | 1 << 21); + pch_iobp_update(0xea0040a1, ~0, 1 << 24); + pch_iobp_update(0xeb0040b1, ~0xffff, 0xc598); + pch_iobp_update(0xec0040b1, ~0xffff, 0xc598); + pch_iobp_update(0xeb0040b6, ~0xffff, 0xc598); + pch_iobp_update(0xea0000a9, ~(3 << 14), 2 << 14); + pch_iobp_update(0xea0001a9, ~(3 << 14), 2 << 14); + pch_iobp_update(0xeb0040b2, ~0xffff, 0xc396); + pch_iobp_update(0xeb0040b3, ~0xffff, 0xc396); + pch_iobp_update(0xec0040b2, ~0xffff, 0xc396); + + /* Assumes SATA direct connect, trace length <= 3.5" */ + pch_iobp_update(0xea0001a9, ~(0x3ff << 3), 0x29f << 3); + pch_iobp_update(SATA_IOBP_SP0G3IR, ~(0xff << 16 | 0x3f << 8), 0x88 << 16 | 3 << 8); + pch_iobp_update(0xea0000a9, ~(0x3ff << 3), 0x29f << 3); + pch_iobp_update(SATA_IOBP_SP1G3IR, ~(0xff << 16 | 0x3f << 8), 0x88 << 16 | 3 << 8); + + /* TODO: Needs special handling */ + pch_iobp_update(0xea007f05, 0, 0x00010642); + + pch_iobp_update(0xea0040b7, ~0xffff, 0xc91c); + pch_iobp_update(0xea0040b8, ~0xffff, 0xc91c); + pch_iobp_update(0xeb0040a1, ~0, 1 << 25); + pch_iobp_update(0xec0040a1, ~0, 1 << 25); + pch_iobp_update(0xea007f0a, ~0, 3 << 30); + + /* PPT A0 resume-only xHCI workaround goes here */ + + /* TODO: This section is PPT-only */ + pch_iobp_update(0xec00404d, ~(0xff3f << 8), 0xff17 << 8); + pch_iobp_update(0xec000084, ~(1 << 31), 0); + pch_iobp_update(0xec000184, ~(1 << 31), 0); + pch_iobp_update(0xec000284, ~(1 << 31), 0); + pch_iobp_update(0xec000384, ~(1 << 31), 0); + pch_iobp_update(0xec000094, ~0, 0xf << 16); + pch_iobp_update(0xec000194, ~0, 0xf << 16); + pch_iobp_update(0xec000294, ~0, 0xf << 16); + pch_iobp_update(0xec000394, ~0, 0xf << 16); + pch_iobp_update(0xec000096, ~0x3ff, 1); + pch_iobp_update(0xec000196, ~0x3ff, 1); + pch_iobp_update(0xec000296, ~0x3ff, 1); + pch_iobp_update(0xec000396, ~0x3ff, 1); + pch_iobp_update(0xec000001, ~0, 3 << 10 | 1 << 3); + pch_iobp_update(0xec000101, ~0, 3 << 10 | 1 << 3); + pch_iobp_update(0xec000201, ~0, 3 << 10 | 1 << 3); + pch_iobp_update(0xec000301, ~0, 3 << 10 | 1 << 3); + pch_iobp_update(0xec0040b5, ~0xffff, 0xc518); + pch_iobp_update(0xec000087, ~(0xf << 8), 5 << 8); + pch_iobp_update(0xec000187, ~(0xf << 8), 5 << 8); + pch_iobp_update(0xec000287, ~(0xf << 8), 5 << 8); + pch_iobp_update(0xec000387, ~(0xf << 8), 5 << 8); + pch_iobp_update(0xea000050, ~(0xff << 16), 0xbb << 16); + pch_iobp_update(0xea000150, ~(0xff << 16), 0xbb << 16); + pch_iobp_update(0xec007f60, ~(0xf << 8), 0xd << 8); + pch_iobp_update(0xea00008d, ~0, 3 << 20); + pch_iobp_update(0xea00018d, ~0, 3 << 20); + + /* TODO: Figure out what these writes mean */ + pch_iobp_update(0xec0007b2, 0, 0x04514b5e); + pch_iobp_update(0xec00078c, 0, 0x40000200); + pch_iobp_update(0xec000780, 0, 0x02000020); } static void pch_enable_gbe(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/49177 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b95134a504d693f8e6f2df35784bf75037b7b16 Gerrit-Change-Number: 49177 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-MessageType: newchange
Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/49177?usp=email ) Change subject: [UNTESTED] sb/intel/bd82x6x: Replace `write_iobp` ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/49177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b95134a504d693f8e6f2df35784bf75037b7b16 Gerrit-Change-Number: 49177 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@mailbox.org> Gerrit-MessageType: abandon
Angel Pons has restored this change. ( https://review.coreboot.org/c/coreboot/+/49177?usp=email ) Change subject: [UNTESTED] sb/intel/bd82x6x: Replace `write_iobp` ...................................................................... Restored -- To view, visit https://review.coreboot.org/c/coreboot/+/49177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b95134a504d693f8e6f2df35784bf75037b7b16 Gerrit-Change-Number: 49177 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@mailbox.org> Gerrit-MessageType: restore
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/49177?usp=email ) Change subject: [UNTESTED] sb/intel/bd82x6x: Replace `write_iobp` ...................................................................... Abandoned No interest in pursuing this -- To view, visit https://review.coreboot.org/c/coreboot/+/49177?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5b95134a504d693f8e6f2df35784bf75037b7b16 Gerrit-Change-Number: 49177 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Patrick Rudolph <rudolphpatrick05@gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-CC: Paul Menzel <paulepanter@mailbox.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer@coreboot.org> Gerrit-MessageType: abandon
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