Change in coreboot[master]: soc/intel/common: Add APIs to check CSE's write protection info - coreboot-gerrit

23 Mar 2022


      Attention is currently required from: Subrata Banik, Tim Wawrzynczak.
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62986 )
Change subject: soc/intel/common: Add APIs to check CSE's write protection info
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Patch Set 4:
(1 comment)
File src/soc/intel/common/block/spi/spi.c:
https://review.coreboot.org/c/coreboot/+/62986/comment/d4653120_dcd65e88 
PS3, Line 53: #if ENV_RAMSTAGE
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If1da0fc410a15996f2e139809f7652127ef8761b
Gerrit-Change-Number: 62986
Gerrit-PatchSet: 4
Gerrit-Owner: Sridhar Siricilla sridhar.siricilla@intel.com
Gerrit-Reviewer: Subrata Banik subratabanik@google.com
Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
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