Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Zheng Bao, Fred Reitberger, Felix Held.
Hello Zheng Bao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/69429
to review the following change.
Change subject: amdfwtool: Set the base address of AMDFW as relative ......................................................................
amdfwtool: Set the base address of AMDFW as relative
Change-Id: If6fd5b21be90ac37618c484506db9b8a1e350ea2 Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M src/mainboard/amd/mandolin/Kconfig M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/mendocino/Kconfig M src/soc/amd/mendocino/Makefile.inc M src/soc/amd/morgana/Kconfig M src/soc/amd/morgana/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/southbridge/amd/pi/hudson/Makefile.inc M util/amdfwtool/amdfwtool.c 13 files changed, 187 insertions(+), 173 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/69429/1
diff --git a/src/mainboard/amd/mandolin/Kconfig b/src/mainboard/amd/mandolin/Kconfig index bfb4cae..c949219 100644 --- a/src/mainboard/amd/mandolin/Kconfig +++ b/src/mainboard/amd/mandolin/Kconfig @@ -70,7 +70,7 @@
config AMD_FWM_POSITION_INDEX int - default 4 if BOARD_AMD_MANDOLIN + default 5 if BOARD_AMD_MANDOLIN default 4 if BOARD_AMD_CEREME help TODO: might need to be adapted for better placement of files in cbfs diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index b8209f8..20a2988 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -319,34 +319,29 @@ config AMD_FWM_POSITION_INDEX int "Firmware Directory Table location (0 to 5)" range 0 5 - default 0 if BOARD_ROMSIZE_KB_512 - default 1 if BOARD_ROMSIZE_KB_1024 - default 2 if BOARD_ROMSIZE_KB_2048 - default 3 if BOARD_ROMSIZE_KB_4096 - default 4 if BOARD_ROMSIZE_KB_8192 - default 5 if BOARD_ROMSIZE_KB_16384 + default 5 help - Typically this is calculated by the ROM size, but there may - be situations where you want to put the firmware directory - table in a different location. - 0: 512 KB - 0xFFFA0000 - 1: 1 MB - 0xFFF20000 - 2: 2 MB - 0xFFE20000 - 3: 4 MB - 0xFFC20000 - 4: 8 MB - 0xFF820000 - 5: 16 MB - 0xFF020000 + The PSP on-chip firmware scans the following offsets for the first + instance of the Embedded Firmware Structure in the 16M SPI address + window. + 0: 0xFA0000 + 1: 0xF20000 + 2: 0xE20000 + 3: 0xC20000 + 4: 0x820000 + 5: 0x20000
-comment "AMD Firmware Directory Table set to location for 512KB ROM" +comment "AMD Firmware Directory Table set to location 0xFA0000" depends on AMD_FWM_POSITION_INDEX = 0 -comment "AMD Firmware Directory Table set to location for 1MB ROM" +comment "AMD Firmware Directory Table set to location 0xF20000" depends on AMD_FWM_POSITION_INDEX = 1 -comment "AMD Firmware Directory Table set to location for 2MB ROM" +comment "AMD Firmware Directory Table set to location 0xE20000" depends on AMD_FWM_POSITION_INDEX = 2 -comment "AMD Firmware Directory Table set to location for 4MB ROM" +comment "AMD Firmware Directory Table set to location 0xC20000" depends on AMD_FWM_POSITION_INDEX = 3 -comment "AMD Firmware Directory Table set to location for 8MB ROM" +comment "AMD Firmware Directory Table set to location 0x820000" depends on AMD_FWM_POSITION_INDEX = 4 -comment "AMD Firmware Directory Table set to location for 16MB ROM" +comment "AMD Firmware Directory Table set to location 0x20000" depends on AMD_FWM_POSITION_INDEX = 5
config AMDFW_CONFIG_FILE diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 508ea1d..c191667 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -66,22 +66,29 @@ $(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\ $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size))
-CEZANNE_FWM_POSITION=$(call int-add, \ - $(call int-subtract, 0xffffffff \ +CEZANNE_FWM_POSITION_REL=$(call int-add, \ + $(call int-subtract, 0xffffff \ $(call int-shift-left, \ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) +CEZANNE_FWM_POSITION_PHY=$(call int-add, \ + $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) \ + $(CEZANNE_FWM_POSITION_REL) 1)
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes # Building the cbfs image will fail if the offset isn't large enough AMD_FW_AB_POSITION := 0x40
-CEZANNE_FW_A_POSITION=$(call int-add, \ +CEZANNE_FW_A_POSITION=$(call int-subtract, \ + $(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_A_START" {print $$3}' $(obj)/fmap_config.h) \ - $(AMD_FW_AB_POSITION)) + $(AMD_FW_AB_POSITION)) \ + $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h))
-CEZANNE_FW_B_POSITION=$(call int-add, \ +CEZANNE_FW_B_POSITION=$(call int-subtract, \ + $(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_B_START" {print $$3}' $(obj)/fmap_config.h) \ - $(AMD_FW_AB_POSITION)) + $(AMD_FW_AB_POSITION)) \ + $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h)) # # PSP Directory Table items # @@ -239,7 +246,7 @@ $(OPT_APOB_NV_BASE) \ $(OPT_VERSTAGE_FILE) \ $(OPT_VERSTAGE_SIG_FILE) \ - --location $(shell printf "%#x" $(CEZANNE_FWM_POSITION)) \ + --location $(shell printf "%#x" $(CEZANNE_FWM_POSITION_REL)) \ --multilevel \ --output $@
@@ -276,7 +283,7 @@
cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom -apu/amdfw-position := $(CEZANNE_FWM_POSITION) +apu/amdfw-position := $(CEZANNE_FWM_POSITION_PHY) apu/amdfw-type := raw
ifeq ($(CONFIG_VBOOT_SLOTS_RW_A)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) diff --git a/src/soc/amd/mendocino/Kconfig b/src/soc/amd/mendocino/Kconfig index d31b29dd..ed8d5bb 100644 --- a/src/soc/amd/mendocino/Kconfig +++ b/src/soc/amd/mendocino/Kconfig @@ -327,34 +327,29 @@ config AMD_FWM_POSITION_INDEX int "Firmware Directory Table location (0 to 5)" range 0 5 - default 0 if BOARD_ROMSIZE_KB_512 - default 1 if BOARD_ROMSIZE_KB_1024 - default 2 if BOARD_ROMSIZE_KB_2048 - default 3 if BOARD_ROMSIZE_KB_4096 - default 4 if BOARD_ROMSIZE_KB_8192 - default 5 if BOARD_ROMSIZE_KB_16384 + default 5 help - Typically this is calculated by the ROM size, but there may - be situations where you want to put the firmware directory - table in a different location. - 0: 512 KB - 0xFFFA0000 - 1: 1 MB - 0xFFF20000 - 2: 2 MB - 0xFFE20000 - 3: 4 MB - 0xFFC20000 - 4: 8 MB - 0xFF820000 - 5: 16 MB - 0xFF020000 + The PSP on-chip firmware scans the following offsets for the first + instance of the Embedded Firmware Structure in the 16M SPI address + window. + 0: 0xFA0000 + 1: 0xF20000 + 2: 0xE20000 + 3: 0xC20000 + 4: 0x820000 + 5: 0x20000
-comment "AMD Firmware Directory Table set to location for 512KB ROM" +comment "AMD Firmware Directory Table set to location 0xFA0000" depends on AMD_FWM_POSITION_INDEX = 0 -comment "AMD Firmware Directory Table set to location for 1MB ROM" +comment "AMD Firmware Directory Table set to location 0xF20000" depends on AMD_FWM_POSITION_INDEX = 1 -comment "AMD Firmware Directory Table set to location for 2MB ROM" +comment "AMD Firmware Directory Table set to location 0xE20000" depends on AMD_FWM_POSITION_INDEX = 2 -comment "AMD Firmware Directory Table set to location for 4MB ROM" +comment "AMD Firmware Directory Table set to location 0xC20000" depends on AMD_FWM_POSITION_INDEX = 3 -comment "AMD Firmware Directory Table set to location for 8MB ROM" +comment "AMD Firmware Directory Table set to location 0x820000" depends on AMD_FWM_POSITION_INDEX = 4 -comment "AMD Firmware Directory Table set to location for 16MB ROM" +comment "AMD Firmware Directory Table set to location 0x20000" depends on AMD_FWM_POSITION_INDEX = 5
config AMDFW_CONFIG_FILE diff --git a/src/soc/amd/mendocino/Makefile.inc b/src/soc/amd/mendocino/Makefile.inc index 8f3425d..c0a3409 100644 --- a/src/soc/amd/mendocino/Makefile.inc +++ b/src/soc/amd/mendocino/Makefile.inc @@ -68,22 +68,30 @@ $(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\ $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size))
-MENDOCINO_FWM_POSITION=$(call int-add, \ - $(call int-subtract, 0xffffffff \ +MENDOCINO_FWM_POSITION_REL=$(call int-add, \ + $(call int-subtract, 0xffffff \ $(call int-shift-left, \ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) +MENDOCINO_FWM_POSITION_PHY=$(call int-add, \ + $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) \ + $(MENDOCINO_FWM_POSITION_REL) 1) +
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes # Building the cbfs image will fail if the offset isn't large enough AMD_FW_AB_POSITION := 0x40
-MENDOCINO_FW_A_POSITION=$(call int-add, \ +MENDOCINO_FW_A_POSITION=$(call int-subtract, \ + $(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_A_START" {print $$3}' $(obj)/fmap_config.h) \ - $(AMD_FW_AB_POSITION)) + $(AMD_FW_AB_POSITION)) \ + $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h))
-MENDOCINO_FW_B_POSITION=$(call int-add, \ +MENDOCINO_FW_B_POSITION=$(call int-subtract, \ + $(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_B_START" {print $$3}' $(obj)/fmap_config.h) \ - $(AMD_FW_AB_POSITION)) + $(AMD_FW_AB_POSITION)) \ + $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h)) # # PSP Directory Table items # @@ -258,7 +266,7 @@ $(OPT_VERSTAGE_FILE) \ $(OPT_VERSTAGE_SIG_FILE) \ $(OPT_SPL_TABLE_FILE) \ - --location $(shell printf "%#x" $(MENDOCINO_FWM_POSITION)) \ + --location $(shell printf "%#x" $(MENDOCINO_FWM_POSITION_REL)) \ --output $@
$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) @@ -298,7 +306,7 @@
cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom -apu/amdfw-position := $(MENDOCINO_FWM_POSITION) +apu/amdfw-position := $(MENDOCINO_FWM_POSITION_PHY) apu/amdfw-type := raw
ifeq ($(CONFIG_VBOOT_SLOTS_RW_A)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) diff --git a/src/soc/amd/morgana/Kconfig b/src/soc/amd/morgana/Kconfig index a1261c9..f031157 100644 --- a/src/soc/amd/morgana/Kconfig +++ b/src/soc/amd/morgana/Kconfig @@ -316,34 +316,29 @@ config AMD_FWM_POSITION_INDEX int "Firmware Directory Table location (0 to 5)" range 0 5 - default 0 if BOARD_ROMSIZE_KB_512 - default 1 if BOARD_ROMSIZE_KB_1024 - default 2 if BOARD_ROMSIZE_KB_2048 - default 3 if BOARD_ROMSIZE_KB_4096 - default 4 if BOARD_ROMSIZE_KB_8192 - default 5 if BOARD_ROMSIZE_KB_16384 + default 5 help - Typically this is calculated by the ROM size, but there may - be situations where you want to put the firmware directory - table in a different location. - 0: 512 KB - 0xFFFA0000 - 1: 1 MB - 0xFFF20000 - 2: 2 MB - 0xFFE20000 - 3: 4 MB - 0xFFC20000 - 4: 8 MB - 0xFF820000 - 5: 16 MB - 0xFF020000 + The PSP on-chip firmware scans the following offsets for the first + instance of the Embedded Firmware Structure in the 16M SPI address + window. + 0: 0xFA0000 + 1: 0xF20000 + 2: 0xE20000 + 3: 0xC20000 + 4: 0x820000 + 5: 0x20000
-comment "AMD Firmware Directory Table set to location for 512KB ROM" +comment "AMD Firmware Directory Table set to location 0xFA0000" depends on AMD_FWM_POSITION_INDEX = 0 -comment "AMD Firmware Directory Table set to location for 1MB ROM" +comment "AMD Firmware Directory Table set to location 0xF20000" depends on AMD_FWM_POSITION_INDEX = 1 -comment "AMD Firmware Directory Table set to location for 2MB ROM" +comment "AMD Firmware Directory Table set to location 0xE20000" depends on AMD_FWM_POSITION_INDEX = 2 -comment "AMD Firmware Directory Table set to location for 4MB ROM" +comment "AMD Firmware Directory Table set to location 0xC20000" depends on AMD_FWM_POSITION_INDEX = 3 -comment "AMD Firmware Directory Table set to location for 8MB ROM" +comment "AMD Firmware Directory Table set to location 0x820000" depends on AMD_FWM_POSITION_INDEX = 4 -comment "AMD Firmware Directory Table set to location for 16MB ROM" +comment "AMD Firmware Directory Table set to location 0x20000" depends on AMD_FWM_POSITION_INDEX = 5
config AMDFW_CONFIG_FILE diff --git a/src/soc/amd/morgana/Makefile.inc b/src/soc/amd/morgana/Makefile.inc index f4243bc..f82765b 100644 --- a/src/soc/amd/morgana/Makefile.inc +++ b/src/soc/amd/morgana/Makefile.inc @@ -70,22 +70,40 @@ $(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\ $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size))
-MORGANA_FWM_POSITION=$(call int-add, \ - $(call int-subtract, 0xffffffff \ +MORGANA_FWM_POSITION1=$(call int-add, \ + $(call int-subtract, 0x1000000 \ + $(call int-shift-left, \ + 1 $(call int-subtract, 24 3))) 0x20000) + +MORGANA_FWM_POSITION2=$(call int-add, \ + $(call int-subtract, 0xffffff \ + $(call int-shift-left, \ + 0x80000 3)) 0x20000 1) + +MORGANA_FWM_POSITION_REL=$(call int-add, \ + $(call int-subtract, 0xffffff \ $(call int-shift-left, \ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) +MORGANA_FWM_POSITION_PHY=$(call int-add, \ + $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) \ + $(MORGANA_FWM_POSITION_REL) 1)
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes # Building the cbfs image will fail if the offset isn't large enough AMD_FW_AB_POSITION := 0x40
-MORGANA_FW_A_POSITION=$(call int-add, \ +MORGANA_FW_A_POSITION=$(call int-subtract, \ + $(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_A_START" {print $$3}' $(obj)/fmap_config.h) \ - $(AMD_FW_AB_POSITION)) + $(AMD_FW_AB_POSITION)) \ + $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h))
-MORGANA_FW_B_POSITION=$(call int-add, \ +MORGANA_FW_B_POSITION=$(call int-subtract, \ + $(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_B_START" {print $$3}' $(obj)/fmap_config.h) \ - $(AMD_FW_AB_POSITION)) + $(AMD_FW_AB_POSITION)) \ + $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h)) + # # PSP Directory Table items # @@ -260,7 +278,7 @@ $(OPT_VERSTAGE_FILE) \ $(OPT_VERSTAGE_SIG_FILE) \ $(OPT_SPL_TABLE_FILE) \ - --location $(shell printf "%#x" $(MORGANA_FWM_POSITION)) \ + --location $(shell printf "%#x" $(MORGANA_FWM_POSITION_REL)) \ --output $@
$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index b24102c..69e4895 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -364,34 +364,29 @@ config AMD_FWM_POSITION_INDEX int "Firmware Directory Table location (0 to 5)" range 0 5 - default 0 if BOARD_ROMSIZE_KB_512 - default 1 if BOARD_ROMSIZE_KB_1024 - default 2 if BOARD_ROMSIZE_KB_2048 - default 3 if BOARD_ROMSIZE_KB_4096 - default 4 if BOARD_ROMSIZE_KB_8192 - default 5 if BOARD_ROMSIZE_KB_16384 + default 5 help - Typically this is calculated by the ROM size, but there may - be situations where you want to put the firmware directory - table in a different location. - 0: 512 KB - 0xFFFA0000 - 1: 1 MB - 0xFFF20000 - 2: 2 MB - 0xFFE20000 - 3: 4 MB - 0xFFC20000 - 4: 8 MB - 0xFF820000 - 5: 16 MB - 0xFF020000 + The PSP on-chip firmware scans the following offsets for the first + instance of the Embedded Firmware Structure in the 16M SPI address + window. + 0: 0xFA0000 + 1: 0xF20000 + 2: 0xE20000 + 3: 0xC20000 + 4: 0x820000 + 5: 0x20000
-comment "AMD Firmware Directory Table set to location for 512KB ROM" +comment "AMD Firmware Directory Table set to location 0xFA0000" depends on AMD_FWM_POSITION_INDEX = 0 -comment "AMD Firmware Directory Table set to location for 1MB ROM" +comment "AMD Firmware Directory Table set to location 0xF20000" depends on AMD_FWM_POSITION_INDEX = 1 -comment "AMD Firmware Directory Table set to location for 2MB ROM" +comment "AMD Firmware Directory Table set to location 0xE20000" depends on AMD_FWM_POSITION_INDEX = 2 -comment "AMD Firmware Directory Table set to location for 4MB ROM" +comment "AMD Firmware Directory Table set to location 0xC20000" depends on AMD_FWM_POSITION_INDEX = 3 -comment "AMD Firmware Directory Table set to location for 8MB ROM" +comment "AMD Firmware Directory Table set to location 0x820000" depends on AMD_FWM_POSITION_INDEX = 4 -comment "AMD Firmware Directory Table set to location for 16MB ROM" +comment "AMD Firmware Directory Table set to location 0x20000" depends on AMD_FWM_POSITION_INDEX = 5
config AMDFW_OUTSIDE_CBFS diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 258323e..2da2753 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -71,22 +71,29 @@ $(if $(CONFIG_AMD_FWM_POSITION_INDEX), ,\ $(error Invalid AMD firmware position index. Check if the board sets a valid ROM size))
-PICASSO_FWM_POSITION=$(call int-add, \ - $(call int-subtract, 0xffffffff \ +PICASSO_FWM_POSITION_REL=$(call int-add, \ + $(call int-subtract, 0xffffff \ $(call int-shift-left, \ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) +PICASSO_FWM_POSITION_PHY=$(call int-add, \ + $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) \ + $(PICASSO_FWM_POSITION_REL) 1)
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes # Building the cbfs image will fail if the offset isn't large enough AMD_FW_AB_POSITION := 0x40
-PICASSO_FW_A_POSITION=$(call int-add, \ +PICASSO_FW_A_POSITION=$(call int-subtract, \ + $(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_A_START" {print $$3}' $(obj)/fmap_config.h) \ - $(AMD_FW_AB_POSITION)) + $(AMD_FW_AB_POSITION)) \ + $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h))
-PICASSO_FW_B_POSITION=$(call int-add, \ +PICASSO_FW_B_POSITION=$(call int-subtract, \ + $(call int-add, \ $(shell awk '$$2 == "FMAP_SECTION_FW_MAIN_B_START" {print $$3}' $(obj)/fmap_config.h) \ - $(AMD_FW_AB_POSITION)) + $(AMD_FW_AB_POSITION)) \ + $(shell awk '$$2 == "FMAP_SECTION_FLASH_START" {print $$3}' $(obj)/fmap_config.h))
# # PSP Directory Table items @@ -255,7 +262,7 @@ $(OPT_APOB0_NV_BASE) \ $(OPT_VERSTAGE_FILE) \ $(OPT_VERSTAGE_SIG_FILE) \ - --location $(shell printf "%#x" $(PICASSO_FWM_POSITION)) \ + --location $(shell printf "%#x" $(PICASSO_FWM_POSITION_REL)) \ --output $@
$(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS) @@ -289,11 +296,12 @@ ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) $(call add_intermediate, add_amdfw, $(obj)/amdfw.rom) printf " DD Adding AMD Firmware\n" + printf "%x\n" $(PICASSO_FWM_POSITION_REL) $(CBFSTOOL) $(obj)/coreboot.pre write -r AMDFW -f $(obj)/amdfw.rom --fill-upward else cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom -apu/amdfw-position := $(PICASSO_FWM_POSITION) +apu/amdfw-position := $(PICASSO_FWM_POSITION_PHY) apu/amdfw-type := raw endif
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 53b986e..dd211d0 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -328,34 +328,29 @@ config AMD_FWM_POSITION_INDEX int "Firmware Directory Table location (0 to 5)" range 0 5 - default 0 if BOARD_ROMSIZE_KB_512 - default 1 if BOARD_ROMSIZE_KB_1024 - default 2 if BOARD_ROMSIZE_KB_2048 - default 3 if BOARD_ROMSIZE_KB_4096 - default 4 if BOARD_ROMSIZE_KB_8192 - default 5 if BOARD_ROMSIZE_KB_16384 + default 5 help - Typically this is calculated by the ROM size, but there may - be situations where you want to put the firmware directory - table in a different location. - 0: 512 KB - 0xFFFA0000 - 1: 1 MB - 0xFFF20000 - 2: 2 MB - 0xFFE20000 - 3: 4 MB - 0xFFC20000 - 4: 8 MB - 0xFF820000 - 5: 16 MB - 0xFF020000 + The PSP on-chip firmware scans the following offsets for the first + instance of the Embedded Firmware Structure in the 16M SPI address + window. + 0: 0xFA0000 + 1: 0xF20000 + 2: 0xE20000 + 3: 0xC20000 + 4: 0x820000 + 5: 0x20000
-comment "AMD Firmware Directory Table set to location for 512KB ROM" +comment "AMD Firmware Directory Table set to location 0xFA0000" depends on AMD_FWM_POSITION_INDEX = 0 -comment "AMD Firmware Directory Table set to location for 1MB ROM" +comment "AMD Firmware Directory Table set to location 0xF20000" depends on AMD_FWM_POSITION_INDEX = 1 -comment "AMD Firmware Directory Table set to location for 2MB ROM" +comment "AMD Firmware Directory Table set to location 0xE20000" depends on AMD_FWM_POSITION_INDEX = 2 -comment "AMD Firmware Directory Table set to location for 4MB ROM" +comment "AMD Firmware Directory Table set to location 0xC20000" depends on AMD_FWM_POSITION_INDEX = 3 -comment "AMD Firmware Directory Table set to location for 8MB ROM" +comment "AMD Firmware Directory Table set to location 0x820000" depends on AMD_FWM_POSITION_INDEX = 4 -comment "AMD Firmware Directory Table set to location for 16MB ROM" +comment "AMD Firmware Directory Table set to location 0x20000" depends on AMD_FWM_POSITION_INDEX = 5
config DIMM_SPD_SIZE diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 078a566..3f0b774 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -80,10 +80,13 @@ # +-----------+ # # EC ROM should be 64K aligned. -STONEYRIDGE_FWM_POSITION=$(call int-add, \ - $(call int-subtract, 0xffffffff \ +STONEYRIDGE_FWM_POSITION_REL=$(call int-add, \ + $(call int-subtract, 0xffffff \ $(call int-shift-left, \ 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000 1) +STONEYRIDGE_FWM_POSITION_PHY=$(call int-add, \ + $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) \ + $(STONEYRIDGE_FWM_POSITION_REL) 1)
### 0
@@ -152,29 +155,24 @@ --config $(CONFIG_AMDFW_CONFIG_FILE) \ $(OPT_SOCNAME) \ --flashsize $(CONFIG_ROM_SIZE) \ - --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \ + --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION_REL)) \ --output $@
ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
# Calculate firmware position inside the ROM -STONEYRIDGE_FWM_ROM_POSITION=$(call int-add, \ - $(call int-subtract, $(CONFIG_ROM_SIZE) \ - $(call int-shift-left, \ - 0x80000 $(CONFIG_AMD_FWM_POSITION_INDEX))) 0x20000) - $(call add_intermediate, add_amdfw, $(obj)/amdfw.rom) printf " DD Adding AMD Firmware at ROM offset 0x%x\n" \ - "$(STONEYRIDGE_FWM_ROM_POSITION)" + "$(STONEYRIDGE_FWM_POSITION_REL)" dd if=$(obj)/amdfw.rom \ of=$< conv=notrunc bs=1 \ - seek=$(STONEYRIDGE_FWM_ROM_POSITION) >/dev/null 2>&1 + seek=$(STONEYRIDGE_FWM_POSITION_REL) >/dev/null 2>&1
else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom -apu/amdfw-position := $(STONEYRIDGE_FWM_POSITION) +apu/amdfw-position := $(STONEYRIDGE_FWM_POSITION_PHY) apu/amdfw-type := raw
endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) diff --git a/src/southbridge/amd/pi/hudson/Makefile.inc b/src/southbridge/amd/pi/hudson/Makefile.inc index d3d9322..6c8d057 100644 --- a/src/southbridge/amd/pi/hudson/Makefile.inc +++ b/src/southbridge/amd/pi/hudson/Makefile.inc @@ -66,11 +66,8 @@ # # EC ROM should be 64K aligned.
-ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) -HUDSON_FWM_POSITION=$(call int-add, $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) 0x20000 1) -else -HUDSON_FWM_POSITION=0xfff20000 -endif +HUDSON_FWM_POSITION_REL=$(call _toint,0x20000) +HUDSON_FWM_POSITION_PHY=$(call int-add, $(call int-subtract, 0xffffffff $(CONFIG_ROM_SIZE)) $(HUDSON_FWM_POSITION_REL) 1)
ifeq ($(CONFIG_HUDSON_PSP), y)
@@ -144,7 +141,7 @@ $(OPT_2SMUFIRMWARE2_FN_FILE) \ $(OPT_2SMUSCS_FILE) \ --flashsize $(CONFIG_ROM_SIZE) \ - --location $(HUDSON_FWM_POSITION) \ + --location $(HUDSON_FWM_POSITION_REL) \ --config $(CONFIG_AMDFW_CONFIG_FILE) \ --output $@
@@ -152,13 +149,13 @@ $(call add_intermediate, add_amdfw, $(obj)/amdfw.rom) printf " DD Adding AMD Firmware\n" dd if=$(obj)/amdfw.rom \ - of=$< conv=notrunc bs=1 seek=131072 >/dev/null 2>&1 + of=$< conv=notrunc bs=1 seek=$(HUDSON_FWM_POSITION_REL) >/dev/null 2>&1
else # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y)
cbfs-files-y += apu/amdfw apu/amdfw-file := $(obj)/amdfw.rom -apu/amdfw-position := $(HUDSON_FWM_POSITION) +apu/amdfw-position := $(HUDSON_FWM_POSITION_PHY) apu/amdfw-type := raw
endif # ifeq ($(CONFIG_AMDFW_OUTSIDE_CBFS),y) diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 389be9f..02de86e 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -1990,7 +1990,6 @@ uint32_t dir_location = 0; bool any_location = 0; uint32_t romsig_offset; - uint32_t rom_base_address; uint8_t soc_id = PLATFORM_UNKNOWN; uint8_t efs_spi_readmode = 0xff; uint8_t efs_spi_speed = 0xff; @@ -2284,12 +2283,6 @@
printf(" AMDFWTOOL Using ROM size of %dKB\n", ctx.rom_size / 1024);
- rom_base_address = 0xFFFFFFFF - ctx.rom_size + 1; - if (dir_location && (dir_location < rom_base_address)) { - fprintf(stderr, "Error: Directory location outside of ROM.\n\n"); - return 1; - } - if (any_location) { if (dir_location & 0x3f) { fprintf(stderr, "Error: Invalid Directory location.\n"); @@ -2298,18 +2291,18 @@ } } else { switch (dir_location) { - case 0: /* Fall through */ - case 0xFFFA0000: /* Fall through */ - case 0xFFF20000: /* Fall through */ - case 0xFFE20000: /* Fall through */ - case 0xFFC20000: /* Fall through */ - case 0xFF820000: /* Fall through */ - case 0xFF020000: /* Fall through */ + case 0: /* Fall through */ + case 0xFA0000: /* Fall through */ + case 0xF20000: /* Fall through */ + case 0xE20000: /* Fall through */ + case 0xC20000: /* Fall through */ + case 0x820000: /* Fall through */ + case 0x020000: /* Fall through */ break; default: fprintf(stderr, "Error: Invalid Directory location.\n"); - fprintf(stderr, " Valid locations are 0xFFFA0000, 0xFFF20000,\n"); - fprintf(stderr, " 0xFFE20000, 0xFFC20000, 0xFF820000, 0xFF020000\n"); + fprintf(stderr, " Valid locations are 0xFA0000, 0xF20000,\n"); + fprintf(stderr, " 0xE20000, 0xC20000, 0x820000, 0x020000\n"); return 1; } } @@ -2321,7 +2314,7 @@ memset(ctx.rom, 0xFF, ctx.rom_size);
if (dir_location) - romsig_offset = ctx.current = dir_location - rom_base_address; + romsig_offset = ctx.current = dir_location; else romsig_offset = ctx.current = AMD_ROMSIG_OFFSET;
-
Bao Zheng (Code Review)