[XS] Change in coreboot[main]: mb/google/brya/var/uldrenite: Add PnP setting

[John Su (Code Review)]

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85597?usp=email )

Change subject: mb/google/brya/var/uldrenite: Add PnP setting
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mb/google/brya/var/uldrenite: Add PnP setting

Referencing the baseboard PnP settings for Uldrenite.

BUG=b:380789023
TEST=emerge-nissa coreboot

Change-Id: Icd537fd5b6bfa589931633b72477414098523b54
---
M src/mainboard/google/brya/variants/uldrenite/overridetree.cb
1 file changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/85597/1

diff --git a/src/mainboard/google/brya/variants/uldrenite/overridetree.cb b/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
index 3154b7c..5031a24 100644
--- a/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
+++ b/src/mainboard/google/brya/variants/uldrenite/overridetree.cb
@@ -120,6 +120,10 @@
    	[PchSerialIoIndexUART2] = PchSerialIoDisabled,
    }"

+	# FIXME: To be enabled in future based on PNP impact data.
+	# Disable Package C-state demotion for nissa baseboard.
+	register "disable_package_c_state_demotion" = "true"
+
    # Intel Common SoC Config
    #+-------------------+---------------------------+
    #| Field             |  Value                    |
@@ -433,6 +437,9 @@
    			device generic 0 alias rp2_wwan on end
    		end
    	end #PCIE2 WWAN card
+		device ref shared_sram on end
+		device ref heci1 on end
+		device ref pmc hidden end
    	device ref emmc on end
    	device ref uart0 on end
    	device ref pch_espi on