[XS] Change in coreboot[master]: soc/intel/cmd/blk/cse: Add a kconfig option to store CSE version

[Dinesh Gehlot (Code Review)]

Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75746?usp=email )

Change subject: soc/intel/cmd/blk/cse: Add a kconfig option to store CSE version
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soc/intel/cmd/blk/cse: Add a kconfig option to store CSE version

This patch implements a new kconfig option, that will store CSE
version in CBMEM memory when enabled.

BUG=b:280722061
Test=Verified the changes nissa board.

Signed-off-by: Dinesh Gehlot 
Change-Id: If8a62d00e6ed15fbe595f3729d921df8cef42fdb
---
M src/soc/intel/common/block/cse/Kconfig
1 file changed, 7 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/75746/1

diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig
index 26c623f..54fd27c 100644
--- a/src/soc/intel/common/block/cse/Kconfig
+++ b/src/soc/intel/common/block/cse/Kconfig
@@ -45,6 +45,13 @@
      Use this config for SoC platform prior to CNL PCH (with postboot_sai implemented)
      to make `HECI1` device disable using private configuration register (PCR) write.

+config SOC_INTEL_STORE_CSE_VERSION
+	bool
+	default n
+	depends on SOC_INTEL_CSE_LITE_SKU
+	help
+	  This configuration option stores CSE firmware version in CBMEM memory.
+
 config SOC_INTEL_STORE_CSE_FPT_PARTITION_VERSION
    bool
    default n