[XS] Change in coreboot[main]: WIP: soc/mediatek/common: Fix eMMC clock

[Kiwi Liu (Code Review)]

Attention is currently required from: Mengqi Zhang.

Hello Mengqi Zhang,

I'd like you to do a code review.
Please visit

https://review.coreboot.org/c/coreboot/+/84298?usp=email

to review the following change.

Change subject: WIP: soc/mediatek/common: Fix eMMC clock
......................................................................

WIP: soc/mediatek/common: Fix eMMC clock

Mediatek SOC start operating at eMMC clock 2-3 MHz
right after power-on.
In JEDEC spec, this period is 400 kHz or less.

BUG=b:356578805
TEST=emerge-corsola coreboot

Change-Id: I9c8836b23fb21e9b0bdc80fbe85142ea0fa5e381
Signed-off-by: Mengqi Zhang 
Signed-off-by: Kiwi Liu 
---
M src/soc/mediatek/common/msdc.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/84298/1

diff --git a/src/soc/mediatek/common/msdc.c b/src/soc/mediatek/common/msdc.c
index df59b0e..fbab8d8 100644
--- a/src/soc/mediatek/common/msdc.c
+++ b/src/soc/mediatek/common/msdc.c
@@ -429,7 +429,7 @@
    memset(host, 0, sizeof(*host));
    host->base = base;
    host->top_base = top_base;
-	host->src_hz = 50 * 1000 * 1000;
+	host->src_hz = 400 * 1000 * 1000;

add_msdc(host);
 }