Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu.
Hello Hung-Te Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/77107?usp=email
to look at the new patch set (#4).
Change subject: mb/google/geralt: Move I2C and SPI initialization to verstage ......................................................................
mb/google/geralt: Move I2C and SPI initialization to verstage
After enabling VBOOT_CBFS_INTEGRATION, bootblock exceeds allocated size (60K) by 3.5K. Since TPM and EC won't be accessed in bootblock, we move I2C and SPI initializaion to verstage to reduce bootblock size. The GSC interrupt pin configuration is also moved to verstage to save more spaces for bootblock.
The size of bootblock.raw.bin is reduced from 64,040 bytes to 60,808 bytes.
BUG=b:294643742 TEST=boot to kernel
Change-Id: I5f6855d5a1a0fce6e739d44652c88e406f6f7b89 Signed-off-by: Yidi Lin yidilin@chromium.org --- M src/mainboard/google/geralt/Makefile.inc M src/mainboard/google/geralt/bootblock.c A src/mainboard/google/geralt/verstage.c 3 files changed, 15 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/77107/4