Andrey Petrov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34679 )
Change subject: soc/fsp_broadwell_de: Implement SMBus read/write over IMC
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Patch Set 8:
(3 comments)
https://review.coreboot.org/c/coreboot/+/34679/5/src/soc/intel/fsp_broadwell...
File src/soc/intel/fsp_broadwell_de/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/34679/5/src/soc/intel/fsp_broadwell...
PS5, Line 22: romstage-y += smbus-imc.c
Nit: Move this up a few lines, to where romstage-y sources are included.
Ack
https://review.coreboot.org/c/coreboot/+/34679/4/src/soc/intel/fsp_broadwell...
File src/soc/intel/fsp_broadwell_de/smbus-imc.c:
https://review.coreboot.org/c/coreboot/+/34679/4/src/soc/intel/fsp_broadwell...
PS4, Line 24: return 0
aren't we returning the word data on success, 0 on failure?
Ack
https://review.coreboot.org/c/coreboot/+/34679/4/src/soc/intel/fsp_broadwell...
PS4, Line 36:
: /* read byte, return 0 on success */
aren't we returning the byte data on success, 0 on failure?
Ack
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