Change in coreboot[master]: soc/intel/common/block/cpu: Enable ROM caching in ramstage

[Subrata Banik (Code Review)]

Attention is currently required from: Subrata Banik, Paul Menzel, Tim Wawrzynczak, Angel Pons, Nick Vaccaro.
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62838 )

Change subject: soc/intel/common/block/cpu: Enable ROM caching in ramstage
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Patch Set 2:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/62838/comment/7172e466_aa7d1ad3 
PS1, Line 9: This patch ensures to have `BIOS region` and `extended BIOS` region is
           : cached if the boot device is memory mapped
> Maybe: […]

Ack

https://review.coreboot.org/c/coreboot/+/62838/comment/c7a6f335_c4ac9e51 
PS1, Line 9: This patch ensures to have `BIOS region` and `extended BIOS` region is
           : cached if the boot device is memory mapped, which is mostly the case
           : with Intel SoC platform.
> Why should this be done? Lower boot time?

Ack

https://review.coreboot.org/c/coreboot/+/62838/comment/2a16ec4a_982a2753 
PS1, Line 12:
> Tested on what device?

Ack