Change in coreboot[master]: soc/intel/jasperlake: Add CdClock frequency config

[Simon Yang (Code Review)]

Attention is currently required from: Nico Huber, Jamie Chen, Henry Sun, Paul Menzel, Tim Wawrzynczak, Ren Kuo, Angel Pons, Kane Chen, Patrick Rudolph.
Simon Yang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60009 )

Change subject: soc/intel/jasperlake: Add CdClock frequency config
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Patch Set 27:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/60009/comment/5355b02e_96ae9247 
PS17, Line 14:
> I don't know what that means exactly and have doubts that I'm authorized […]

Hi Nico,

I have add more comment in chip.h, do you think is it enough to explain what's the upd CdClock did?

File src/soc/intel/jasperlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/60009/comment/fcd2148f_c0590e35 
PS21, Line 212: 	params->CdClock = config->cd_clock ? config->cd_clock - 1 : 0xff;
> Still missing a comment about 0xff here.

sorry for missed the comment and thank you for your kindly remind.
I added the 0xff to point out the maximum value.