Change in coreboot[master]: vendor: mediatek: Add mediatek mt8192 dram initialization codes

[Xi Chen (Code Review)]

Attention is currently required from: Hung-Te Lin, Nico Huber, Martin Roth, Paul Menzel, Yu-Ping Wu.
Xi Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50294 )

Change subject: vendor: mediatek: Add mediatek mt8192 dram initialization codes
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Patch Set 9:

(6 comments)

File src/vendorcode/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/50294/comment/f6db3e42_4306cbba 
PS8, Line 7: #
> remove this comment?

For build pass because coreboot soc dram calibration code already exists, will enable when vendorcode & soc code are ready.

File src/vendorcode/mediatek/Kconfig:

https://review.coreboot.org/c/coreboot/+/50294/comment/535772ef_44868f8e 
PS9, Line 9: config MT8192_DRAM_EMCP
           : 	bool
           : 	default y
           : 	help
           : 	  The eMCP platform should select this option to run at different DRAM
           : 	  frequencies.
> Is this still used? I thought we are using sdram_params for EMCP now.

no used, will remove.

File src/vendorcode/mediatek/mt8192/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/50294/comment/a57d27e5_4128bbfa 
PS9, Line 7: ramstage-y += dpm.c
> why is dpm included?

will move to soc folder.

https://review.coreboot.org/c/coreboot/+/50294/comment/2cd1ec72_a1b744cb 
PS9, Line 9: BL31_MAKEARGS += PLAT=mt8192
> we don't need this?

yes, no need, will remove.

File src/vendorcode/mediatek/mt8192/dpm.c:

https://review.coreboot.org/c/coreboot/+/50294/comment/0db70b52_a83e12c8 
PS9, Line 1: License
> dpm should not be in DRAM code?

will move to soc folder.

File src/vendorcode/mediatek/mt8192/memory.c:

https://review.coreboot.org/c/coreboot/+/50294/comment/2006dbf4_3ec01090 
PS9, Line 1: License
> this file should be in soc folder.

Ack