the following patch was just integrated into master: commit de8c7e39bce97f13e09e53a3a1bdf4edcfebec79 Author: Lee Leahy leroy.p.leahy@intel.com Date: Sun Feb 14 14:55:29 2016 -0800
Documentation: x86 device tree processing and memory map
Add documentation on: * FSP Silicon Init * How to start the x86 device tree processing for ramstage * Disabling the PCI devices * Generic PCI device drivers * Memory map support
TEST=None
Change-Id: If8f729a0ea1d48db4d5ec1d4ae3ad693e9fe44f0 Signed-off-by: Lee Leahy leroy.p.leahy@intel.com Reviewed-on: https://review.coreboot.org/13718 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth martinroth@google.com
See https://review.coreboot.org/13718 for details.
-gerrit