[S] Change in coreboot[master]: device & commonlib: Update pci_scan_bus postcodes

[Martin L Roth (Code Review)]

Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69201 )

Change subject: device & commonlib: Update pci_scan_bus postcodes
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device & commonlib: Update pci_scan_bus postcodes

The function pci_scan_bus had 3 post codes in it:
0x24 - beginning
0x25 - middle
0x55 - end

I got rid of the middle postcode and used 0x25 for the code signifying
the end of the function.  I don't think all three are needed.

0x24 & 0x25 postcodes are not currently used anywhere else in the code.

Signed-off-by: Martin Roth 
Change-Id: I19c9d5e256505b64234919a99f73a71efbbfdae3
---
M src/commonlib/include/commonlib/console/post_codes.h
M src/device/pci_device.c
2 files changed, 36 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/69201/1

diff --git a/src/commonlib/include/commonlib/console/post_codes.h b/src/commonlib/include/commonlib/console/post_codes.h
index 8ab069b..d838815 100644
--- a/src/commonlib/include/commonlib/console/post_codes.h
+++ b/src/commonlib/include/commonlib/console/post_codes.h
@@ -66,6 +66,20 @@
 #define POST_ENTRY_C_START			0x13

/**
+ * \brief Entry into pci_scan_bus
+ *
+ * Entered pci_scan_bus()
+ */
+#define POST_ENTER_PCI_SCAN_BUS			0x24
+
+/**
+ * \brief Entry into pci_scan_bus
+ *
+ * Entered pci_scan_bus()
+ */
+#define POST_EXIT_PCI_SCAN_BUS			0x25
+
+/**
  * \brief Pre-memory init preparation start
  *
  * Post code emitted in romstage before making callbacks to allow SoC/mainboard
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 70af9c5..7ad8e5b 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -1423,7 +1423,7 @@
    	max_devfn=0xff;
    }

-	post_code(0x24);
+	post_code(POST_ENTER_PCI_SCAN_BUS);

if (pci_bus_only_one_child(bus))
    	max_devfn = MIN(max_devfn, 0x07);
@@ -1464,8 +1464,6 @@
    	}
    }

-	post_code(0x25);
-
    /*
     * Warn if any leftover static devices are found.
     * There's probably a problem in devicetree.cb.
@@ -1516,7 +1514,7 @@
     * side of any bridges that may be on this bus plus any devices.
     * Return how far we've got finding sub-buses.
     */
-	post_code(0x55);
+	post_code(POST_EXIT_PCI_SCAN_BUS);
 }

typedef enum {