Change in coreboot[master]: drivers/pc80/rtc: Swap cmos_write32() parameter order
Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38178 ) Change subject: drivers/pc80/rtc: Swap cmos_write32() parameter order ...................................................................... drivers/pc80/rtc: Swap cmos_write32() parameter order Make it consistent with the more used cmos_write(). Change-Id: I9cf643c770e9819de08dbede48b73f3d4fe15bd7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> --- M src/console/post.c M src/include/pc80/mc146818rtc.h M src/northbridge/intel/sandybridge/raminit_mrc.c 3 files changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/38178/1 diff --git a/src/console/post.c b/src/console/post.c index a426fcc..9d535cb 100644 --- a/src/console/post.c +++ b/src/console/post.c @@ -98,8 +98,8 @@ cmos_write(0, CMOS_POST_BANK_0_OFFSET); cmos_write(0, CMOS_POST_BANK_1_OFFSET); #if CONFIG(CMOS_POST_EXTRA) - cmos_write32(CMOS_POST_BANK_0_EXTRA, 0); - cmos_write32(CMOS_POST_BANK_1_EXTRA, 0); + cmos_write32(0, CMOS_POST_BANK_0_EXTRA); + cmos_write32(0, CMOS_POST_BANK_1_EXTRA); #endif } @@ -113,10 +113,10 @@ switch (cmos_read(CMOS_POST_BANK_OFFSET)) { case CMOS_POST_BANK_0_MAGIC: - cmos_write32(CMOS_POST_BANK_0_EXTRA, value); + cmos_write32(value, CMOS_POST_BANK_0_EXTRA); break; case CMOS_POST_BANK_1_MAGIC: - cmos_write32(CMOS_POST_BANK_1_EXTRA, value); + cmos_write32(value, CMOS_POST_BANK_1_EXTRA); break; } diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index aa50773..a8221c7 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -171,7 +171,7 @@ return value; } -static inline void cmos_write32(u8 offset, u32 value) +static inline void cmos_write32(u32 value, u8 offset) { u8 i; for (i = 0; i < sizeof(value); ++i) diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index aa166c9..959ea41 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -66,11 +66,11 @@ pei_data->mrc_output_len); /* Save the MRC seed values to CMOS */ - cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed); + cmos_write32(pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); printk(BIOS_DEBUG, "Save scrambler seed 0x%08x to CMOS 0x%02x\n", pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); - cmos_write32(CMOS_OFFSET_MRC_SEED_S3, pei_data->scrambler_seed_s3); + cmos_write32(pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); printk(BIOS_DEBUG, "Save s3 scrambler seed 0x%08x to CMOS 0x%02x\n", pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); -- To view, visit https://review.coreboot.org/c/coreboot/+/38178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cf643c770e9819de08dbede48b73f3d4fe15bd7 Gerrit-Change-Number: 38178 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-MessageType: newchange
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38178 ) Change subject: drivers/pc80/rtc: Swap cmos_write32() parameter order ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/38178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cf643c770e9819de08dbede48b73f3d4fe15bd7 Gerrit-Change-Number: 38178 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Sun, 05 Jan 2020 08:18:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38178 ) Change subject: drivers/pc80/rtc: Swap cmos_write32() parameter order ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/38178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cf643c770e9819de08dbede48b73f3d4fe15bd7 Gerrit-Change-Number: 38178 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Sun, 05 Jan 2020 10:34:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38178 ) Change subject: drivers/pc80/rtc: Swap cmos_write32() parameter order ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/38178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cf643c770e9819de08dbede48b73f3d4fe15bd7 Gerrit-Change-Number: 38178 Gerrit-PatchSet: 2 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Comment-Date: Mon, 06 Jan 2020 00:52:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment
Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38178 ) Change subject: drivers/pc80/rtc: Swap cmos_write32() parameter order ...................................................................... drivers/pc80/rtc: Swap cmos_write32() parameter order Make it consistent with the more used cmos_write(). Change-Id: I9cf643c770e9819de08dbede48b73f3d4fe15bd7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38178 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> --- M src/console/post.c M src/include/pc80/mc146818rtc.h M src/northbridge/intel/sandybridge/raminit_mrc.c 3 files changed, 7 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Patrick Rudolph: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/console/post.c b/src/console/post.c index a426fcc..9d535cb 100644 --- a/src/console/post.c +++ b/src/console/post.c @@ -98,8 +98,8 @@ cmos_write(0, CMOS_POST_BANK_0_OFFSET); cmos_write(0, CMOS_POST_BANK_1_OFFSET); #if CONFIG(CMOS_POST_EXTRA) - cmos_write32(CMOS_POST_BANK_0_EXTRA, 0); - cmos_write32(CMOS_POST_BANK_1_EXTRA, 0); + cmos_write32(0, CMOS_POST_BANK_0_EXTRA); + cmos_write32(0, CMOS_POST_BANK_1_EXTRA); #endif } @@ -113,10 +113,10 @@ switch (cmos_read(CMOS_POST_BANK_OFFSET)) { case CMOS_POST_BANK_0_MAGIC: - cmos_write32(CMOS_POST_BANK_0_EXTRA, value); + cmos_write32(value, CMOS_POST_BANK_0_EXTRA); break; case CMOS_POST_BANK_1_MAGIC: - cmos_write32(CMOS_POST_BANK_1_EXTRA, value); + cmos_write32(value, CMOS_POST_BANK_1_EXTRA); break; } diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index aa50773..a8221c7 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -171,7 +171,7 @@ return value; } -static inline void cmos_write32(u8 offset, u32 value) +static inline void cmos_write32(u32 value, u8 offset) { u8 i; for (i = 0; i < sizeof(value); ++i) diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index aa166c9..959ea41 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -66,11 +66,11 @@ pei_data->mrc_output_len); /* Save the MRC seed values to CMOS */ - cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed); + cmos_write32(pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); printk(BIOS_DEBUG, "Save scrambler seed 0x%08x to CMOS 0x%02x\n", pei_data->scrambler_seed, CMOS_OFFSET_MRC_SEED); - cmos_write32(CMOS_OFFSET_MRC_SEED_S3, pei_data->scrambler_seed_s3); + cmos_write32(pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); printk(BIOS_DEBUG, "Save s3 scrambler seed 0x%08x to CMOS 0x%02x\n", pei_data->scrambler_seed_s3, CMOS_OFFSET_MRC_SEED_S3); -- To view, visit https://review.coreboot.org/c/coreboot/+/38178 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9cf643c770e9819de08dbede48b73f3d4fe15bd7 Gerrit-Change-Number: 38178 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus@gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-MessageType: merged
participants (4)
-
Angel Pons (Code Review) -
Kyösti Mälkki (Code Review)
-
Patrick Rudolph (Code Review)
-
Paul Menzel (Code Review)