Attention is currently required from: Lean Sheng Tan, Werner Zeh.
Hello build bot (Jenkins), Angel Pons, Lean Sheng Tan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68667
to look at the new patch set (#3).
Change subject: soc/intel/eklhartlake: Provide an option to disable the L1 prefetcher ......................................................................
soc/intel/eklhartlake: Provide an option to disable the L1 prefetcher
Depending on the real workload that is executed on the system the L1 prefetcher might be too aggressive and will populate the L1 cache ahead with data that is not really needed. In the end, this will result in a higher cache miss rate thus slowing down the real application.
This patch provides a devicetree option to disable the L1 prefetcher if needed. This can be requested on mainboard level if needed.
Change-Id: I3fc8fb79c42c298a20928ae4912ee23916463038 Signed-off-by: Werner Zeh werner.zeh@siemens.com --- M src/soc/intel/elkhartlake/chip.h M src/soc/intel/elkhartlake/cpu.c 2 files changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/68667/3