[S] Change in coreboot[master]: vendorcode/mediatek/mt8192: Fix set but unused variables

[Arthur Heymans (Code Review)]

Attention is currently required from: Xi Chen.

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/74543 )

Change subject: vendorcode/mediatek/mt8192: Fix set but unused variables
......................................................................

vendorcode/mediatek/mt8192: Fix set but unused variables

TEST: BUILD_TIMELESS=1 binary remains the same.

Change-Id: Ic05a9819764c03184b54c4fc58dbe325fddeae10
Signed-off-by: Arthur Heymans 
---
M src/vendorcode/mediatek/mt8192/dramc/dramc_dvfs.c
M src/vendorcode/mediatek/mt8192/dramc/dramc_pi_basic_api.c
M src/vendorcode/mediatek/mt8192/dramc/dramc_top.c
M src/vendorcode/mediatek/mt8192/dramc/emi.c
M src/vendorcode/mediatek/mt8192/include/dramc_common.h
M src/vendorcode/mediatek/mt8192/include/x_hal_io.h
6 files changed, 20 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/74543/1

diff --git a/src/vendorcode/mediatek/mt8192/dramc/dramc_dvfs.c b/src/vendorcode/mediatek/mt8192/dramc/dramc_dvfs.c
index 7c74d4b..8d921ec 100644
--- a/src/vendorcode/mediatek/mt8192/dramc/dramc_dvfs.c
+++ b/src/vendorcode/mediatek/mt8192/dramc/dramc_dvfs.c
@@ -1260,12 +1260,10 @@

void DPMEnableTracking(DRAMC_CTX_T *p, U32 u4Reg, U32 u4Field, U8 u1ShuIdx, U8 u1Enable)
 {
-	U32 val, fld;
+	U32 fld;

fld = Fld(1, (Fld_shft(u4Field) + u1ShuIdx));

-	val = (u1Enable) ? 1 : 0;
-
    vIO32WriteFldAlign_All(u4Reg, u1Enable, fld);
 }

@@ -2218,4 +2216,3 @@
    	cbt_switch_freq(p, CBT_HIGH_FREQ);
    }
 }
-
diff --git a/src/vendorcode/mediatek/mt8192/dramc/dramc_pi_basic_api.c b/src/vendorcode/mediatek/mt8192/dramc/dramc_pi_basic_api.c
index ffdf3d6..0ac85c6 100644
--- a/src/vendorcode/mediatek/mt8192/dramc/dramc_pi_basic_api.c
+++ b/src/vendorcode/mediatek/mt8192/dramc/dramc_pi_basic_api.c
@@ -271,6 +271,7 @@
 #else//ett
    emi_set = &default_emi_setting;
 #endif
+	(void)emi_set;

u4value = ((emi_set->EMI_CONA_VAL >> 17) & 0x1)? 0: 1;//CONA 17th bit 0: Disable dual rank mode 1: Enable dual rank mode

@@ -309,6 +310,7 @@
 #else//ett
    emi_set = &default_emi_setting;
 #endif
+	(void)emi_set;

// lookup table to find highest freq
    highestfreqsel = GetSelByFreq(p, u2HighestFreq);
diff --git a/src/vendorcode/mediatek/mt8192/dramc/dramc_top.c b/src/vendorcode/mediatek/mt8192/dramc/dramc_top.c
index aa4f2ef..2d8e990 100644
--- a/src/vendorcode/mediatek/mt8192/dramc/dramc_top.c
+++ b/src/vendorcode/mediatek/mt8192/dramc/dramc_top.c
@@ -413,10 +413,8 @@
 #ifdef COMBO_MCP
 static int mt_get_mdl_number(void)
 {
-	static int found = 0;
    static int mdl_number = -1;

-	found = 1;
    mdl_number = get_ddr_geometry();

return mdl_number;
@@ -1195,4 +1193,3 @@
    return (mr8_value & 0xff);
 }
 #endif
-
diff --git a/src/vendorcode/mediatek/mt8192/dramc/emi.c b/src/vendorcode/mediatek/mt8192/dramc/emi.c
index c440b00..c7bebda 100644
--- a/src/vendorcode/mediatek/mt8192/dramc/emi.c
+++ b/src/vendorcode/mediatek/mt8192/dramc/emi.c
@@ -585,9 +585,6 @@
    unsigned long long ch0_rank0_size, ch0_rank1_size;
    unsigned long long ch1_rank0_size, ch1_rank1_size;
    unsigned int cen_emi_conh = mt_emi_sync_read(EMI_CONH);
-	unsigned long long dq_width;
-
-	dq_width = 2;

dram_rank_size[0] = 0;
    dram_rank_size[1] = 0;
diff --git a/src/vendorcode/mediatek/mt8192/include/dramc_common.h b/src/vendorcode/mediatek/mt8192/include/dramc_common.h
index 599ebe9..5a7d8e4 100644
--- a/src/vendorcode/mediatek/mt8192/include/dramc_common.h
+++ b/src/vendorcode/mediatek/mt8192/include/dramc_common.h
@@ -55,17 +55,17 @@

#if CALIBRATION_LOG
 #define msg(_x_...)	{ print(_x_); }
-#define msg2(_x_...)	// { print(_x_); }
+#define msg2(_x_,...)	{ if (0) { printk(BIOS_NEVER, _x_, ##__VA_ARGS__); } } // { print(_x_); }
 #define err(_x_...) 	{ print(_x_); }
 #else
 #define msg(_x_...)
-#define msg2(_x_...)
+#define msg2(_x_, ...) { if (0) { (void)##_VA_ARGS__ } }
 #define err(_x_...)
 #endif

#define info(_x_...) msg(_x_)

-#define msg3(_x_...) // { print(_x_); }
+#define msg3(_x_,...) { if (0) { printk(BIOS_NEVER, _x_, ##__VA_ARGS__); } } // { print(_x_); }
 #define msg4(_x_...)
 #define msg5(_x_...)
 #define jv_msg(_x_...)
diff --git a/src/vendorcode/mediatek/mt8192/include/x_hal_io.h b/src/vendorcode/mediatek/mt8192/include/x_hal_io.h
index ef75df9..3689878 100644
--- a/src/vendorcode/mediatek/mt8192/include/x_hal_io.h
+++ b/src/vendorcode/mediatek/mt8192/include/x_hal_io.h
@@ -65,6 +65,7 @@
    UINT16 upk = 1; \
    INT32 msk = (INT32)(list); \
    { upk = 0; \
+	  (void)upk; \
     ((U32)msk == 0xffffffff)? (vIO32Write4B(reg32, (list))): (((U32)msk)? vIO32Write4BMsk(reg32, (list), ((U32)msk)):(U32)0); \
    } \
 }/*lint -restore */
@@ -80,6 +81,7 @@
    UINT16 upk = 1; \
    INT32 msk = (INT32)(list); \
    { upk = 0; \
+	(void)upk; \
     ((U32)msk == 0xffffffff)? (vIO32Write4B_All(reg32, (list))): (((U32)msk)? vIO32Write4BMsk_All(reg32, (list), ((U32)msk)): (void)0); \
    } \
 }/*lint -restore */