Change in coreboot[master]: sb/amd/hudson: Skip setting up LPC decode for base < 0x20

[Michał Żygowski (Code Review)]

Attention is currently required from: Nico Huber, Angel Pons, Arthur Heymans, Felix Held.
Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54669 )

Change subject: sb/amd/hudson: Skip setting up LPC decode for base < 0x20
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Patch Set 5:

(1 comment)

Patchset:

PS5:
> The coreboot code should not report the SB-TSI resource if its base is out of that <100h : FFEh> ran […]

Which Super I/O chip driver really checks allowed boundaries specified in its datasheet? None. Each mainboard's devictree is created with an assumption that unassigned io/irq resource is just disabled resource.
1. The Super I/O drivers should start checking the resources in terms of boundaries (and maybe resource existence, i.e. whether devicetree sets it)
2. The PNP driver which assigns resources should also understand that zero resources are disabled resources if we don't do it in the point 1.