Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80142?usp=email )
Change subject: mb/google/puff: Baseboard devicetree clean up #2 ......................................................................
mb/google/puff: Baseboard devicetree clean up #2
Don't enable the i2c controllers, since the variants will enable the ones they need individually in their overrridetrees. Disable gspi1 since all variants disable it in their overridetrees.
TEST=tested with rest of patch train
Change-Id: Ia9c67a8e05923a080e31d04721ecae4c810e82e8 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/puff/variants/baseboard/devicetree.cb 1 file changed, 0 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/80142/1
diff --git a/src/mainboard/google/puff/variants/baseboard/devicetree.cb b/src/mainboard/google/puff/variants/baseboard/devicetree.cb index 16f94da..6768711 100644 --- a/src/mainboard/google/puff/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/puff/variants/baseboard/devicetree.cb @@ -284,13 +284,8 @@ end end device ref sdxc on end - device ref i2c0 on end - device ref i2c1 on end - device ref i2c2 on end - device ref i2c3 on end device ref heci1 on end device ref sata on end - device ref i2c4 on end device ref pcie_rp9 on # X4 NVME register "PcieRpSlotImplemented[8]" = "1" @@ -312,7 +307,6 @@ device spi 0 on end end end - device ref gspi1 on end device ref lpc_espi on chip ec/google/chromeec device pnp 0c09.0 on end