Naresh Solanki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85638?usp=email )
Change subject: arch/x86/cpu: Mark fill_cpu_cache_info as weak ......................................................................
arch/x86/cpu: Mark fill_cpu_cache_info as weak
This allows SoC to implement silicon specific implementation.
Change-Id: I60707de4c8242a8fbda8cb5b791a1db762d94449 Signed-off-by: Naresh Solanki naresh.solanki@9elements.com --- M src/arch/x86/cpu_common.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/85638/1
diff --git a/src/arch/x86/cpu_common.c b/src/arch/x86/cpu_common.c index 5f7cd5d..b7db635 100644 --- a/src/arch/x86/cpu_common.c +++ b/src/arch/x86/cpu_common.c @@ -212,7 +212,7 @@ return (cpuid_edx(5) >> (state * 4)) & 0xf; }
-bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info) +bool __weak fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info) { if (!info) return false;