[M] Change in coreboot[main]: mb/ebang: Add Ebang EBAZ4205 mainboard

[Nicholas Chin (Code Review)]

Nicholas Chin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84345?usp=email )

Change subject: mb/ebang: Add Ebang EBAZ4205 mainboard
......................................................................

mb/ebang: Add Ebang EBAZ4205 mainboard

The EBAZ4205 is the control board for the Ebang Ebit-E9 bitcoin miner,
and uses the Xilinx Zynq 7000 SoC. The miner itself is no longer
profitable and thus surplus/used boards are being sold as relatively
cheap development boards for the Zynq platform. This port mainly serves
as a platform to test the Zynq SoC code as it is being brought up.

Change-Id: I8dc1f08050d8deb8d05bdef14625f41257f1acd1
Signed-off-by: Nicholas Chin 
---
A src/mainboard/ebang/Kconfig
A src/mainboard/ebang/Kconfig.name
A src/mainboard/ebang/ebaz4205/Kconfig
A src/mainboard/ebang/ebaz4205/Kconfig.name
A src/mainboard/ebang/ebaz4205/Makefile.mk
A src/mainboard/ebang/ebaz4205/board_info.txt
A src/mainboard/ebang/ebaz4205/bootblock.c
A src/mainboard/ebang/ebaz4205/devicetree.cb
A src/mainboard/ebang/ebaz4205/media.c
A src/mainboard/ebang/ebaz4205/romstage.c
10 files changed, 110 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/84345/1

diff --git a/src/mainboard/ebang/Kconfig b/src/mainboard/ebang/Kconfig
new file mode 100644
index 0000000..aa971ee
--- /dev/null
+++ b/src/mainboard/ebang/Kconfig
@@ -0,0 +1,17 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+if VENDOR_EBANG
+
+choice
+	prompt "Mainboard model"
+
+source "src/mainboard/ebang/*/Kconfig.name"
+
+endchoice
+
+source "src/mainboard/ebang/*/Kconfig"
+
+config MAINBOARD_VENDOR
+	default "Ebang"
+
+endif # VENDOR_EBANG
diff --git a/src/mainboard/ebang/Kconfig.name b/src/mainboard/ebang/Kconfig.name
new file mode 100644
index 0000000..c6c79b2
--- /dev/null
+++ b/src/mainboard/ebang/Kconfig.name
@@ -0,0 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config VENDOR_EBANG
+	bool "Ebang"
diff --git a/src/mainboard/ebang/ebaz4205/Kconfig b/src/mainboard/ebang/ebaz4205/Kconfig
new file mode 100644
index 0000000..80da225
--- /dev/null
+++ b/src/mainboard/ebang/ebaz4205/Kconfig
@@ -0,0 +1,23 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+if BOARD_EBANG_EBAZ4205
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select SOC_XILINX_ZYNQ7000
+
+config MAINBOARD_DIR
+	default "ebang/ebaz4205"
+
+config MAINBOARD_PART_NUMBER
+	default "EBAZ4205"
+
+config DRAM_SIZE_MB
+	int
+	default 256
+
+config UART_FOR_CONSOLE
+	int
+	default 1
+
+endif
diff --git a/src/mainboard/ebang/ebaz4205/Kconfig.name b/src/mainboard/ebang/ebaz4205/Kconfig.name
new file mode 100644
index 0000000..5907049
--- /dev/null
+++ b/src/mainboard/ebang/ebaz4205/Kconfig.name
@@ -0,0 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config BOARD_EBANG_EBAZ4205
+	bool "Ebang Ebit EBAZ4205"
diff --git a/src/mainboard/ebang/ebaz4205/Makefile.mk b/src/mainboard/ebang/ebaz4205/Makefile.mk
new file mode 100644
index 0000000..20530ee
--- /dev/null
+++ b/src/mainboard/ebang/ebaz4205/Makefile.mk
@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+bootblock-y += media.c
+romstage-y += media.c
+ramstage-y += media.c
+
+bootblock-y += bootblock.c
+romstage-y += romstage.c
diff --git a/src/mainboard/ebang/ebaz4205/board_info.txt b/src/mainboard/ebang/ebaz4205/board_info.txt
new file mode 100644
index 0000000..c67b641
--- /dev/null
+++ b/src/mainboard/ebang/ebaz4205/board_info.txt
@@ -0,0 +1 @@
+Category: sbc
diff --git a/src/mainboard/ebang/ebaz4205/bootblock.c b/src/mainboard/ebang/ebaz4205/bootblock.c
new file mode 100644
index 0000000..056c72d
--- /dev/null
+++ b/src/mainboard/ebang/ebaz4205/bootblock.c
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/mmio.h>
+#include <bootblock_common.h>
+
+#define SLCR_LOCK ((void *)0xF8000004u)
+#define SLCR_UNLOCK ((void *)0xF8000008u)
+#define SLCR_UART_RST_CTRL ((void *)0xF8000228u)
+#define MIO24 ((void *)0xF8000760u)
+#define MIO25 ((void *)0xF8000764u)
+
+void bootblock_mainboard_early_init(void)
+{
+	/* Initialize MIO pins for the UART
+	   TODO: move this to generic MIO init code */
+	write16(SLCR_UNLOCK, 0xdf0d);
+	/* Asset UART controller reset */
+	write32(SLCR_UART_RST_CTRL, 0xf);
+	/* Deassert UART controller reset */
+	write32(SLCR_UART_RST_CTRL, 0);
+	/* UART1 RX */
+	write32(MIO25, 0x000016e1);
+	/* UART1 TX */
+	write32(MIO24, 0x000016e0);
+	/* Configure refclk */
+	write32((void *)0xf8000154, 0x3f02);
+	write16(SLCR_LOCK, 0x767b);
+}
diff --git a/src/mainboard/ebang/ebaz4205/devicetree.cb b/src/mainboard/ebang/ebaz4205/devicetree.cb
new file mode 100644
index 0000000..44a95d1
--- /dev/null
+++ b/src/mainboard/ebang/ebaz4205/devicetree.cb
@@ -0,0 +1,6 @@
+chip soc/xilinx/zynq7000
+
+	device domain 0 on
+	end
+
+end
diff --git a/src/mainboard/ebang/ebaz4205/media.c b/src/mainboard/ebang/ebaz4205/media.c
new file mode 100644
index 0000000..25f0041
--- /dev/null
+++ b/src/mainboard/ebang/ebaz4205/media.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <boot_device.h>
+
+const struct region_device *boot_device_ro(void)
+{
+	/* TODO */
+	return NULL;
+}
diff --git a/src/mainboard/ebang/ebaz4205/romstage.c b/src/mainboard/ebang/ebaz4205/romstage.c
new file mode 100644
index 0000000..c412315
--- /dev/null
+++ b/src/mainboard/ebang/ebaz4205/romstage.c
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <console/console.h>
+#include <program_loading.h>
+
+void main(void)
+{
+	console_init();
+	run_ramstage();
+}