Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34683 )
Change subject: soc/intel/fsp_broadwell_de: Enable early integrated UART ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34683/5/src/soc/intel/fsp_broadwell... File src/soc/intel/fsp_broadwell_de/romstage/romstage.c:
https://review.coreboot.org/c/coreboot/+/34683/5/src/soc/intel/fsp_broadwell... PS5, Line 71: uint32_t reset_sts = pci_mmio_read_config32(ubox_dev, UBOX_SC_RESET_STATUS);
like discussed on other patch, some of these registers can't be accessed over IO. […]
Done