[S] Change in coreboot[master]: ACPI: Obsolete FADT duty_offset and duty_width fields

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74438 )

(

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: ACPI: Obsolete FADT duty_offset and duty_width fields
......................................................................

ACPI: Obsolete FADT duty_offset and duty_width fields

After the obsoletion of Processor() it is necessary to provide
_PTC package to define P_CNT IO address for clock throttling.
The platforms touched here already emit empty _PTC to disable
clock throttling.

Change-Id: I0e84c8ccd2772c9b3d61f71b74324c8d28f4eefe
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74438
Reviewed-by: Arthur Heymans 
Tested-by: build bot (Jenkins) 
---
M src/acpi/acpi.c
M src/southbridge/intel/bd82x6x/fadt.c
M src/southbridge/intel/ibexpeak/fadt.c
M src/southbridge/intel/lynxpoint/fadt.c
4 files changed, 24 insertions(+), 8 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index f8994eb..fb9a758 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -1689,6 +1689,10 @@
    fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED;
    fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED;

+	/* Use CPU _PTC instead to provide P_CNT details. */
+	fadt->duty_offset = 0;
+	fadt->duty_width = 0;
+
    fadt->preferred_pm_profile = acpi_get_preferred_pm_profile();

if (CONFIG(USE_PC_CMOS_ALTCENTURY))
diff --git a/src/southbridge/intel/bd82x6x/fadt.c b/src/southbridge/intel/bd82x6x/fadt.c
index a9e7a36..296ee2b 100644
--- a/src/southbridge/intel/bd82x6x/fadt.c
+++ b/src/southbridge/intel/bd82x6x/fadt.c
@@ -31,9 +31,7 @@
    fadt->pm2_cnt_len = 1;
    fadt->pm_tmr_len = 4;
    fadt->gpe0_blk_len = 16;
-	/* P_CNT not supported */
-	fadt->duty_offset = 0;
-	fadt->duty_width = 0;
+
    fadt->day_alrm = 0xd;
    fadt->mon_alrm = 0x00;
    fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
diff --git a/src/southbridge/intel/ibexpeak/fadt.c b/src/southbridge/intel/ibexpeak/fadt.c
index d6084ee..dfb9774 100644
--- a/src/southbridge/intel/ibexpeak/fadt.c
+++ b/src/southbridge/intel/ibexpeak/fadt.c
@@ -31,9 +31,7 @@
    fadt->pm2_cnt_len = 1;
    fadt->pm_tmr_len = 4;
    fadt->gpe0_blk_len = 16;
-	/* P_CNT not supported */
-	fadt->duty_offset = 0;
-	fadt->duty_width = 0;
+
    fadt->day_alrm = 0xd;
    fadt->mon_alrm = 0x00;
    fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;
diff --git a/src/southbridge/intel/lynxpoint/fadt.c b/src/southbridge/intel/lynxpoint/fadt.c
index ba9439c..a90d0a8 100644
--- a/src/southbridge/intel/lynxpoint/fadt.c
+++ b/src/southbridge/intel/lynxpoint/fadt.c
@@ -44,8 +44,6 @@
    else
    	fadt->gpe0_blk_len = 2 * 8;

-	fadt->duty_offset = 0;
-	fadt->duty_width = 0;
    fadt->day_alrm = 0xd;
    fadt->mon_alrm = 0x00;
    fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES | ACPI_FADT_8042;