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Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
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Patch Set 64:
(1 comment)
File src/soc/intel/pantherlake/include/soc/pcr_ids.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/94ab09c5_35603da2?usp... :
PS64, Line 9: #define PID_XHCI 0x09
Hi Subrata, there's a change in PID value, we found 09 to be matching with FSP code and HAS document, though 3A is captured in EDS. I will comment it to be TODO and will update once cross verified with external FSP after it gets released.
Please keep comments open for discussion.
I would rather relying on FSP source code to look into the correct PID value. HAS might often stale and copied from last platform.
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