Change in coreboot[master]: drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1
Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42487 )
Change subject: drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1 ......................................................................
drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1
Not all FSPs based on FSP 2.1 supports the feature of external PPI interface pulled in via FSP_PEIM_TO_PEIM_INTERFACE.
Deselect FSP_PEIM_TO_PEIM_INTERFACE when PLATFORM_USES_FSP2_1 is selected.
Update Kconfig of SOCs affected (icelake, jasperlake, tigerlake).
Change-Id: I5df03f8bcf15c9e05c9fd904a79f740260a3aed7 Signed-off-by: Jonathan Zhang jonzhang@fb.com --- M src/drivers/intel/fsp2_0/Kconfig M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/jasperlake/Kconfig M src/soc/intel/tigerlake/Kconfig 5 files changed, 5 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/42487/1
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index c7c44cd..f6395c5 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -11,12 +11,10 @@ default n select PLATFORM_USES_FSP2_0 select FSP_USES_CB_STACK - select FSP_PEIM_TO_PEIM_INTERFACE help Include FSP 2.1 wrappers and functionality. - Features added into FSP 2.1 specification that impacts coreboot are: + Feature added into FSP 2.1 specification that impacts coreboot is: 1. Remove FSP stack switch and use the same stack with boot firmware - 2. FSP should support external PPI interface pulled in via FSP_PEIM_TO_PEIM_INTERFACE
config PLATFORM_USES_FSP2_2 bool diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig index 8cc572d..3c29b24 100644 --- a/src/soc/intel/common/block/cpu/Kconfig +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -61,7 +61,7 @@ config USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI bool "Perform MP Initialization by FSP using coreboot MP PPI service" depends on FSP_USES_MP_SERVICES_PPI - default y if PLATFORM_USES_FSP2_1 + default y if FSP_PEIM_TO_PEIM_INTERFACE default n help This option allows FSP to make use of MP services PPI published by diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 83a62ca..f58aa33 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -31,6 +31,7 @@ select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_1 + select FSP_PEIM_TO_PEIM_INTERFACE select REG_SCRIPT select SMP select PMC_GLOBAL_RESET_ENABLE_LOCK diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 4e514c4..2a8391e 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -32,6 +32,7 @@ select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_1 + select FSP_PEIM_TO_PEIM_INTERFACE select REG_SCRIPT select SMP select PMC_GLOBAL_RESET_ENABLE_LOCK diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index a61cbfc..a00b33d 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -32,6 +32,7 @@ select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_1 + select FSP_PEIM_TO_PEIM_INTERFACE select REG_SCRIPT select SMP select PMC_GLOBAL_RESET_ENABLE_LOCK
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42487 )
Change subject: drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1 ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42487 )
Change subject: drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1 ......................................................................
drivers/intel/fsp2_0: decouple FSP_PEIM_TO_PEIM_INTERFACE from FSP 2.1
Not all FSPs based on FSP 2.1 supports the feature of external PPI interface pulled in via FSP_PEIM_TO_PEIM_INTERFACE.
Deselect FSP_PEIM_TO_PEIM_INTERFACE when PLATFORM_USES_FSP2_1 is selected.
Update Kconfig of SOCs affected (icelake, jasperlake, tigerlake).
Change-Id: I5df03f8bcf15c9e05c9fd904a79f740260a3aed7 Signed-off-by: Jonathan Zhang jonzhang@fb.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/42487 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com --- M src/drivers/intel/fsp2_0/Kconfig M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/jasperlake/Kconfig M src/soc/intel/tigerlake/Kconfig 5 files changed, 5 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved
diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index fc1eaf6..3caa04a 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -11,12 +11,10 @@ default n select PLATFORM_USES_FSP2_0 select FSP_USES_CB_STACK - select FSP_PEIM_TO_PEIM_INTERFACE help Include FSP 2.1 wrappers and functionality. - Features added into FSP 2.1 specification that impacts coreboot are: + Feature added into FSP 2.1 specification that impacts coreboot is: 1. Remove FSP stack switch and use the same stack with boot firmware - 2. FSP should support external PPI interface pulled in via FSP_PEIM_TO_PEIM_INTERFACE
config PLATFORM_USES_FSP2_2 bool diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig index 8cc572d..3c29b24 100644 --- a/src/soc/intel/common/block/cpu/Kconfig +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -61,7 +61,7 @@ config USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI bool "Perform MP Initialization by FSP using coreboot MP PPI service" depends on FSP_USES_MP_SERVICES_PPI - default y if PLATFORM_USES_FSP2_1 + default y if FSP_PEIM_TO_PEIM_INTERFACE default n help This option allows FSP to make use of MP services PPI published by diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 83a62ca..f58aa33 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -31,6 +31,7 @@ select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_1 + select FSP_PEIM_TO_PEIM_INTERFACE select REG_SCRIPT select SMP select PMC_GLOBAL_RESET_ENABLE_LOCK diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index 72b0c5e..89bbdd3 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -33,6 +33,7 @@ select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_1 + select FSP_PEIM_TO_PEIM_INTERFACE select REG_SCRIPT select SMP select PMC_GLOBAL_RESET_ENABLE_LOCK diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index f502940..c30519c 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -33,6 +33,7 @@ select PARALLEL_MP_AP_WORK select MICROCODE_BLOB_UNDISCLOSED select PLATFORM_USES_FSP2_1 + select FSP_PEIM_TO_PEIM_INTERFACE select REG_SCRIPT select SMP select PMC_GLOBAL_RESET_ENABLE_LOCK
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Jonathan Zhang (Code Review) -
Patrick Georgi (Code Review)
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Subrata Banik (Code Review)