[XS] Change in coreboot[main]: mb/google/brox/var/lotso: disable RTS5227 PCIE L0s support

[Jian Tong (Code Review)]

Attention is currently required from: Karthik Ramasubramanian, Paul Menzel, Subrata Banik.

Jian Tong has posted comments on this change by Jian Tong. ( https://review.coreboot.org/c/coreboot/+/84177?usp=email )

Change subject: mb/google/brox/var/lotso: disable RTS5227 PCIE L0s support
......................................................................

Patch Set 5:

(2 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/84177/comment/fce1d171_0b18213d?usp... :
PS3, Line 9: Because of RTS5227 don't support L0s, so set to ASPM_L1.
> What is the result of that? Errors in the log? Non-working device? […]

Done

https://review.coreboot.org/c/coreboot/+/84177/comment/37a4f6b4_3545f2d1?usp... :
PS3, Line 12: TEST=emerge-brox sys-boot/coreboot sys-boot/chromeos-bootimage
> How can the change be verified?

Done