[L] Change in coreboot[main]: Post-build control of serial

[Stefan Reinauer (Code Review)]

Attention is currently required from: Felix Singer, Simon Glass.

Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77712?usp=email )

Change subject: Post-build control of serial
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Patch Set 2:

(4 comments)

Patchset:

PS2: 
I'd like to see this functionality in coreboot.

File Documentation/util/cbfstool/ccb.md:

https://review.coreboot.org/c/coreboot/+/77712/comment/e0e5eb86_e35f0961 :
PS2, Line 11: ccb-set
can we have this be more "natural"?

```
cbfstool ... control -n serial ...
cbfstool ... configure -n serial ...
```

?

File src/commonlib/include/commonlib/ccb.h:

https://review.coreboot.org/c/coreboot/+/77712/comment/c743780f_41249a8e :
PS2, Line 32: struct ccb {
            : 	uint32_t magic;
            : 	uint32_t flags;
            : };
            : 
Can we / do we want to migrate GBB into this format as well? It would be nice to not have several types of "control blocks" in coreboot. Instead I would prefer if we used "one mechanism for one type of task"

File src/console/Kconfig:

https://review.coreboot.org/c/coreboot/+/77712/comment/98e7a96d_6eab31dc :
PS2, Line 443: config CONSOLE_SILENT_IN_CCB
             : 	bool "Flag for silencing console is in coreboot control block"
             : 	default y
             : 	help
             : 	  This enables using the coreboot control block (CCB) to obtain the
             : 	  console silence flag in the bootblock. This is set to 0 by default,
             : 	  meaning that the console is active (if enabled) but can be set to 1
             : 	  by an external tool operating on the image.
What other mechanisms would we use here instead of CCB? Can we just have one that works everywhere?

(Of course, nvram could be another option if not)