Change in coreboot[master]: Revert "soc/mediatek/mt8186: Set RTC capid to 0xC0 to pass XTAL 26 MH...

[Marina Michelle (Code Review)]

Attention is currently required from: Hung-Te Lin, Rex-BC Chen, Paul Menzel, Yu-Ping Wu, Felix Held.
Hello Hung-Te Lin, build bot (Jenkins), Rex-BC Chen, Paul Menzel, Yu-Ping Wu, Felix Held,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/62530

to review the following change.

Change subject: Revert "soc/mediatek/mt8186: Set RTC capid to 0xC0 to pass XTAL 26 MHz test"
......................................................................

Revert "soc/mediatek/mt8186: Set RTC capid to 0xC0 to pass XTAL 26 MHz test"

This reverts commit c89f252608d87d7db7731fdd9c80b4bed0e33b9b.

Reason for revert: <INSERT REASONING HERE>
No good

Change-Id: Icb83c806d9da6be346d7b099847a79a63bf9202d
---
M src/soc/mediatek/mt8186/include/soc/rtc.h
M src/soc/mediatek/mt8186/rtc.c
2 files changed, 0 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/62530/1

diff --git a/src/soc/mediatek/mt8186/include/soc/rtc.h b/src/soc/mediatek/mt8186/include/soc/rtc.h
index a3fb7a0..3a0c7cd 100644
--- a/src/soc/mediatek/mt8186/include/soc/rtc.h
+++ b/src/soc/mediatek/mt8186/include/soc/rtc.h
@@ -143,7 +143,6 @@
    PMIC_RG_DCXO_CW00	= 0x0788,
    PMIC_RG_DCXO_CW00_CLR	= 0x078C,
    PMIC_RG_DCXO_CW02	= 0x0790,
-	PMIC_RG_DCXO_CW03	= 0x0794,
    PMIC_RG_DCXO_CW07	= 0x079A,
    PMIC_RG_DCXO_CW09	= 0x079E,
    PMIC_RG_DCXO_CW11	= 0x07A2,
diff --git a/src/soc/mediatek/mt8186/rtc.c b/src/soc/mediatek/mt8186/rtc.c
index 2f78be8..528f42b 100644
--- a/src/soc/mediatek/mt8186/rtc.c
+++ b/src/soc/mediatek/mt8186/rtc.c
@@ -13,8 +13,6 @@
 #include <soc/pmic_wrap.h>
 #include <timer.h>

-#define MT8186_RTC_DXCO_CAPID 0xC0
-
 /* Initialize RTC setting of using DCXO clock */
 static bool rtc_enable_dcxo(void)
 {
@@ -233,16 +231,6 @@
    rtc_write(PMIC_RG_DCXO_CW23, 0x0052);
 }

-static void rtc_set_capid(u16 capid)
-{
-	u16 read_capid;
-
-	rtc_write(PMIC_RG_DCXO_CW03, 0xFF00 | capid);
-
-	rtc_read(PMIC_RG_DCXO_CW03, &read_capid);
-	rtc_info("read back capid: %#x\n", read_capid & 0xFF);
-}
-
 /* Check RTC Initialization */
 int rtc_init(int recover)
 {
@@ -349,8 +337,6 @@
    rtc_write(PMIC_RG_DCXO_CW09, 0x408F);
    mdelay(5);

-	rtc_set_capid(MT8186_RTC_DXCO_CAPID);
-
    mt6366_dcxo_disable_unused();
 }